A method for fabricating a semiconductor integrated circuit structure having a reduced width gate electrode. A pre-gate electrode having a width is first delineated by conventional lithography techniques. The conductive layer is partially etched to expose a first and second pre-gate side wall. With the pre-gate side walls exposed, the structure is oxidized to grow an oxide layer on the pre-gate side walls, thereby consuming a predetermined amount of the conductive material. The newly formed oxide layer is then removed to reduce the pre-gate width while retaining at least a portion of an oxide layer above the conductive layer as a mask. The reduced width gate electrode is completed by etching the remaining unmasked conductive layer.