A semiconductor test system makes possible to test memory devices having arbitrary latency cycles when using a plurality of pattern generators. In each of the pattern generators, a fixed cycle shift circuit shifts an expected value signal by one cycle with the operating period of the pattern generator, a selector selects one of the expected value signals from the plurality of pattern generators including the pattern generator of itself, and cycle shift circuit is provided at the output of the selector. In another aspect, the semiconductor test system further includes a plurality of timing generators for generating a plurality of strobe signals to be supplied to a comparator, and a plurality of phase converters for shifting the phases of the expected value pattern from the pattern generators.