- 专利标题: Programmable logic array integrated circuit architectures
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申请号: US807561申请日: 1997-02-28
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公开(公告)号: US5963049A公开(公告)日: 1999-10-05
- 发明人: Richard G. Cliff , Francis B. Heile , Joseph Huang , Christopher F. Lane , Fung Fung Lee , Cameron McClintock , David W. Mendel , Ninh D. Ngo , Bruce B. Pedersen , Srinivas T. Reddy , Chiakang Sung , Kerry Veenstra , Bonnie I. Wang
- 申请人: Richard G. Cliff , Francis B. Heile , Joseph Huang , Christopher F. Lane , Fung Fung Lee , Cameron McClintock , David W. Mendel , Ninh D. Ngo , Bruce B. Pedersen , Srinivas T. Reddy , Chiakang Sung , Kerry Veenstra , Bonnie I. Wang
- 申请人地址: CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: CA San Jose
- 主分类号: H03K19/173
- IPC分类号: H03K19/173 ; H03K19/177
摘要:
A programmable logic array integrated circuit device has a plurality of regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of regions. The output signals of several regions share a group of drivers for applying region output signals to interconnection conductors that convey signals between regions. This conserves driver resources and increases signal routing flexibility. Various approaches can be used for configuring the interconnection conductors to also conserve interconnection conductor resources. Logic regions may be used to directly drive specific input/output cells, thereby simplifying signal routing to the I/O cells and also possibly simplifying the structure of the I/O cells (e.g., by allowing certain I/O cell functions to be performed in the associated logic region). Region output signal routing flexibility may also be enhanced to facilitate simultaneous performance of combinatorial logic and a separate "lonely register" function in modules of the regions.
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