发明授权
US5964835A Storage access validation to data messages using partial storage address
data indexed entries containing permissible address range validation
for message source
失效
使用部分存储地址数据索引的条目对数据消息进行存储访问验证，其中包含消息源的允许的地址范围验证
- 专利标题： Storage access validation to data messages using partial storage address data indexed entries containing permissible address range validation for message source
- 专利标题（中）： 使用部分存储地址数据索引的条目对数据消息进行存储访问验证，其中包含消息源的允许的地址范围验证
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申请号： US482618申请日： 1995-06-07
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公开(公告)号： US5964835A公开(公告)日： 1999-10-12
- 发明人: Daniel L. Fowler , William Edward Baker , William Patterson Bunton , Gary F. Campbell , Richard W. Cutts, Jr. , David J. Garcia , Paul N. Hintikka , Robert W. Horst , Geoffrey I. Iswandhi , David P. Sonnier , William Joel Watson , Frank A. Williams
- 申请人： Daniel L. Fowler , William Edward Baker , William Patterson Bunton , Gary F. Campbell , Richard W. Cutts, Jr. , David J. Garcia , Paul N. Hintikka , Robert W. Horst , Geoffrey I. Iswandhi , David P. Sonnier , William Joel Watson , Frank A. Williams
- 申请人地址： CA Cupertino
- 专利权人： Tandem Computers Incorporated
- 当前专利权人： Tandem Computers Incorporated
- 当前专利权人地址： CA Cupertino
- 主分类号： G06F11/18
- IPC分类号： G06F11/18 ; G01R31/317 ; G01R31/3185 ; G06F1/12 ; G06F9/52 ; G06F11/00 ; G06F11/10 ; G06F11/16 ; G06F11/20 ; G06F11/273 ; G06F12/08 ; G06F12/14 ; G06F12/16 ; G06F13/00 ; H04L12/56 ; H04L29/14
摘要：
A multiprocessor system includes a number of central processing unit (CPUs) and at least one input/output (I/O) device interconnected by routing apparatus for communicating packetized messages therebetween. The messages contain address information identifying the source and destination of the message, and may also contain requests to write to, or read from, storage of a CPU. Protection against errant reads or writes is provided by an access validation method that utilizes access validation information contained in plural entries maintained by each CPU. Each entry provides validation by identifying what elements of the system has read and/or write wccss to the memory of that CPU, without which memory access is denied.
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