发明授权
- 专利标题: Method for fabricating a bipolar transistor
- 专利标题(中): 双极晶体管的制造方法
-
申请号: US237884申请日: 1999-01-27
-
公开(公告)号: US5970356A公开(公告)日: 1999-10-19
- 发明人: Chang-ki Jeon
- 申请人: Chang-ki Jeon
- 申请人地址: KRX Suwon
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KRX Suwon
- 优先权: KRX98-08283 19980312
- 主分类号: H01L29/73
- IPC分类号: H01L29/73 ; H01L21/285 ; H01L21/331 ; H01L21/763 ; H01L29/08 ; H01L29/732
摘要:
A bipolar transistor and a method of fabricating the same are provided which are adapted to reduce chip size and production costs. To produce the transistor, a second conductive type well region is formed in a first conductive type semiconductor substrate and isolation trenches are formed at both sides of the well region. A high density second conductive type buried layer is formed in the semiconductor substrate which is formed at the bottom of the isolation trench. The buried layer is formed in two regions surrounding respective bottoms of two adjacent isolation trenches. The two regions are electrically connected with each other and in direct contact with the well region. An extrinsic base region and a device isolation region are formed sequentially onto the semiconductor substrate using a nitration layer pattern as a mask, wherein the nitration layer pattern is formed on the surface of semiconductor substrate. An intrinsic base region is formed into the well region and an emitter region into the intrinsic base region using the device isolation layer as a mask. The bipolar transistor and method of fabrication can reduce the chip size, the production costs, and the resistance of the collector by forming the isolation trench, wherein the isolation trench is used to form the buried layer and functions as a sink layer (collector layer). The process provides self-alignment of the extrinsic base region, the intrinsic base region, and the emitter region to reduce process scattering.
公开/授权文献
信息查询
IPC分类: