发明授权
US5973373A Read-only-memory cell arrangement using vertical MOS transistors and
gate dielectrics of different thicknesses and method for its production
失效
使用垂直MOS晶体管和不同厚度的栅极电介质的只读存储单元布置及其制造方法
- 专利标题： Read-only-memory cell arrangement using vertical MOS transistors and gate dielectrics of different thicknesses and method for its production
- 专利标题（中）： 使用垂直MOS晶体管和不同厚度的栅极电介质的只读存储单元布置及其制造方法
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申请号： US817630申请日： 1997-03-26
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公开(公告)号： US5973373A公开(公告)日： 1999-10-26
- 发明人: Wolfgang Krautschneider , Lothar Risch , Franz Hofmann , Wolfgang Rosner
- 申请人： Wolfgang Krautschneider , Lothar Risch , Franz Hofmann , Wolfgang Rosner
- 申请人地址： DEX Munich
- 专利权人： Siemens Aktiengesellschaft
- 当前专利权人： Siemens Aktiengesellschaft
- 当前专利权人地址： DEX Munich
- 优先权： DEX4434725 19940928
- 主分类号： H01L21/8247
- IPC分类号： H01L21/8247 ; H01L21/8246 ; H01L27/112 ; H01L29/788 ; H01L29/792 ; H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113
摘要：
A read-only-memory cell arrangement comprises memory cells, each having a vertical MOS transistor, in a substrate (21) made of semiconductor material, the various logic values (zero, one) being implemented by gate dielectrics (27, 28) of different thickness. The memory cell arrangement can preferably be produced in a silicon substrate, with a small number of process steps and a high packing density. The memory cell arrangement and a drive circuit for read-out can in this case be produced in an integrated manner.
公开/授权文献
- US5195350A Method for forming features on an elongated metal wire 公开/授权日：1993-03-23
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