发明授权
US5977574A High density gate array cell architecture with sharing of well taps
between cells
失效
高密度门阵列单元结构，在单元之间共享阱抽头
- 专利标题： High density gate array cell architecture with sharing of well taps between cells
- 专利标题（中）： 高密度门阵列单元结构，在单元之间共享阱抽头
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申请号： US829520申请日： 1997-03-28
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公开(公告)号： US5977574A公开(公告)日： 1999-11-02
- 发明人: Jonathan Schmitt , Timothy V. Statz
- 申请人： Jonathan Schmitt , Timothy V. Statz
- 申请人地址： CA Milpitas
- 专利权人： LSI Logic Corporation
- 当前专利权人： LSI Logic Corporation
- 当前专利权人地址： CA Milpitas
- 主分类号： H01L21/82
- IPC分类号： H01L21/82 ; H01L27/118
摘要：
An arrangement and method for making a gate array architecture locates the well taps at the outer corners of each gate cell. The power buses are also located at the outside of the gate cell as well, enabling sharing of the well taps and the power buses. The location of the well taps at the outside corners of the standard cell reduces the number of transistors in a single repeatable cell from eight transistors to four transistors.
公开/授权文献
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