Power supply ESD protection circuit
    1.
    发明授权
    Power supply ESD protection circuit 失效
    电源ESD保护电路

    公开(公告)号:US5825601A

    公开(公告)日:1998-10-20

    申请号:US876925

    申请日:1997-06-16

    IPC分类号: H01L27/02 H02H3/22

    CPC分类号: H01L27/0266

    摘要: An electrostatic discharge (ESD) protection circuit includes first and second supply terminals, a current source, a shunt transistor, an inverter and a voltage level shifting device. The shunt transistor is coupled between the first and second supply terminals and has a control terminal. The inverter includes an input coupled to the current source, an output coupled to the control terminal of the shunt transistor and pull-up and pull-down transistors coupled between the first and second supply terminals. The pull-up and pull-down transistors have control terminals which are coupled to the input. The voltage level shifting device is coupled between the input and the control terminal of one of the pull-up and pull-down transistors.

    摘要翻译: 静电放电(ESD)保护电路包括第一和第二电源端子,电流源,分流晶体管,反相器和电压电平移位装置。 并联晶体管耦合在第一和第二电源端子之间并且具有控制端子。 反相器包括耦合到电流源的输入端,耦合到并联晶体管的控制端的输出端和耦合在第一和第二电源端之间的上拉和下拉晶体管。 上拉和下拉晶体管具有耦合到输入端的控制端子。 电压电平移位装置耦合在上拉和下拉晶体管之一的输入端和控制端之间。

    Output buffer with regulated voltage biasing for driving voltages
greater than transistor tolerance
    3.
    发明授权
    Output buffer with regulated voltage biasing for driving voltages greater than transistor tolerance 失效
    具有调节电压偏置的输出缓冲器,用于驱动电压大于晶体管容限

    公开(公告)号:US5966030A

    公开(公告)日:1999-10-12

    申请号:US906357

    申请日:1997-08-05

    IPC分类号: H03K19/003 H03K19/0175

    CPC分类号: H03K19/00315

    摘要: An output driver circuit includes first and second supply terminals, first and second complementary data terminals and an output terminal. A pull-up transistor is coupled between the first supply terminal and the output terminal and has a first control terminal. A pull-down transistor is coupled between the second supply terminal and the output terminal and has a second control terminal which is coupled to the second data terminal. A voltage level shifting circuit is coupled between the first complementary data terminal and the first control terminal and is biased between the first supply terminal and a voltage-controlled node. A voltage regulator is coupled to the voltage-controlled node for regulating the node at a selected voltage.

    摘要翻译: 输出驱动器电路包括第一和第二电源端子,第一和第二互补数据端子以及输出端子。 上拉晶体管耦合在第一电源端子和输出端子之间,并且具有第一控制端子。 下拉晶体管耦合在第二电源端子和输出端子之间,并且具有耦合到第二数据端子的第二控制端子。 电压电平移位电路耦合在第一互补数据端和第一控制端之间,并被偏压在第一电源端和压控节点之间。 电压调节器耦合到电压控制节点,用于在所选择的电压下调节节点。

    Hearing aid amplifier circuitry
    4.
    发明授权
    Hearing aid amplifier circuitry 失效
    助听放大器电路

    公开(公告)号:US5745587A

    公开(公告)日:1998-04-28

    申请号:US475230

    申请日:1995-06-07

    摘要: An electroacoustic device such as a hearing aid having a battery, microphone, speaker, a preamplifier, a voltage regulator and power amplifier. The power amplifier includes identically configured output and bridge stages connected to opposite sides of the speaker, the output signals from the output stage being connected through a blocking capacitor to the input of the bridge stage. The output/bridge stage circuit includes an interface stage and two current gain stages. The interface stage converts voltage signals to current signals with a pair of outputs respectively connected to the two like-configured current gain stages. Each current gain stage includes two successive sections, each having a pair of transistors, one of which is configured as a diode connected in series with a resistor to shunt current from the base of the other transistor. The current output of the current gain stages is thus responsive to the input current level, permitting low quiescent current with efficient delivery of current to the receiver, and providing high peak currents with minimum distortion. Also, quiescent current is essentially insensitive to variations in battery voltage and temperature.

    摘要翻译: 诸如具有电池,麦克风,扬声器,前置放大器,电压调节器和功率放大器的助听器的电声器件。 功率放大器包括连接到扬声器相对侧的相同配置的输出和桥接级,来自输出级的输出信号通过阻塞电容器连接到桥接级的输入端。 输出/桥级电路包括一个接口级和两个电流增益级。 接口级将电压信号转换成电流信号,其中一对输出分别连接到两个相似的电流增益级。 每个电流增益级包括两个连续的部分,每个部分具有一对晶体管,其中一个晶体管被配置为与电阻器串联连接的二极管,以从另一个晶体管的基极分流电流。 电流增益级的电流输出因此响应于输入电流电平,允许低静态电流,同时有效地传送电流到接收器,并提供具有最小失真的高峰值电流。 此外,静态电流本质上对电池电压和温度的变化不敏感。

    High density gate array cell architecture with sharing of well taps
between cells
    5.
    发明授权
    High density gate array cell architecture with sharing of well taps between cells 失效
    高密度门阵列单元结构,在单元之间共享阱抽头

    公开(公告)号:US5977574A

    公开(公告)日:1999-11-02

    申请号:US829520

    申请日:1997-03-28

    IPC分类号: H01L21/82 H01L27/118

    CPC分类号: H01L27/11807

    摘要: An arrangement and method for making a gate array architecture locates the well taps at the outer corners of each gate cell. The power buses are also located at the outside of the gate cell as well, enabling sharing of the well taps and the power buses. The location of the well taps at the outside corners of the standard cell reduces the number of transistors in a single repeatable cell from eight transistors to four transistors.

    摘要翻译: 用于制造门阵列结构的布置和方法将阱抽头定位在每个栅极单元的外角处。 电力总线也位于门电池的外部,能够共享井口和电力总线。 在标准单元的外角处的阱抽头的位置将单个可重复单元中的晶体管的数量从八个晶体管减少到四个晶体管。