发明授权
- 专利标题: Method of manufacturing a semiconductor integrated circuit device
- 专利标题(中): 制造半导体集成电路器件的方法
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申请号: US393623申请日: 1999-09-10
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公开(公告)号: US6069038A公开(公告)日: 2000-05-30
- 发明人: Takashi Hashimoto , Kenichi Kuroda , Shoji Shukuri
- 申请人: Takashi Hashimoto , Kenichi Kuroda , Shoji Shukuri
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX10-258936 19980911
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L21/822 ; H01L21/8234 ; H01L21/8239 ; H01L21/8242 ; H01L27/04 ; H01L27/10 ; H01L27/108 ; H01L21/8244
摘要:
A silicon nitride film is left behind on only regions for forming the gate electrodes (word lines) of memory-cell selecting MISFETs constituting a DRAM, and it is not left behind on either of the gate electrodes of MISFETs constituting a logic LSI and those of MISFETs constituting the memory cells of an SRAM. Thereafter, the gate electrodes (word lines) in the DRAM and the gate electrodes in the logic LSI and the SRAM are simultaneously patterned by etching which employs the silicon nitride film and a photoresist film as a mask. Thus, in the manufacture of a semiconductor integrated circuit device wherein both the DRAM and the logic LSI are mounted, a contact hole forming process (gate-SAC) for the DRAM is made compatible with a contact hole forming process (L-SAC).
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