Invention Grant
US6091270A Process for multiplying the frequency of a clock signal with control of the duty ratio, and corresponding device 失效
用于将时钟信号的频率与占空比的控制相乘的过程以及相应的器件

  • Patent Title: Process for multiplying the frequency of a clock signal with control of the duty ratio, and corresponding device
  • Patent Title (中): 用于将时钟信号的频率与占空比的控制相乘的过程以及相应的器件
  • Application No.: US83549
    Application Date: 1998-05-22
  • Publication No.: US6091270A
    Publication Date: 2000-07-18
  • Inventor: Xavier Cauchy
  • Applicant: Xavier Cauchy
  • Applicant Address: FRX Gentilly
  • Assignee: SGS-Thomson Microelectronics S.A.
  • Current Assignee: SGS-Thomson Microelectronics S.A.
  • Current Assignee Address: FRX Gentilly
  • Priority: FRX9709022 19970716
  • Main IPC: H03B19/00
  • IPC: H03B19/00 H03K5/00
Process for multiplying the frequency of a clock signal with control of
the duty ratio, and corresponding device
Abstract:
A frequency-doubling block includes an input terminal for the incident signal, a first variable delay cell linked to the input, and an EXCLUSIVE OR gate, one input of which is linked to the output of the first delay cell, the other input of which is linked to the input terminal, and the output of which is able to deliver an output clock signal at twice the frequency of the incident signal. A comparison circuit compares the duty ratio of the output signal with a predetermined reference value and a modulation circuit modulates the value of the first delay as a function of the result of the comparison.
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