发明授权
US6130556A Integrated circuit I/O buffer with 5V well and passive gate voltage 失效
具有5V阱和无源栅极电压的集成电路I / O缓冲器

Integrated circuit I/O buffer with 5V well and passive gate voltage
摘要:
An integrated circuit buffer includes a core output terminal, a pad terminal, a pad pull-down transistor, a pad pull-up transistor, a pull-down control circuit and a pull-up control circuit. The pad pull-down transistor and the pad pull-up transistor are coupled to the pad terminal and have pull-up and pull-down control terminals, respectively. The pull-down control circuit is coupled between the core output terminal and the pull-down control terminal. The pull-up control circuit is coupled between the core output terminal and the pull-up control terminal. A pull-up voltage protection transistor is coupled in series between the pad pull-up transistor and the pad terminal and has a control terminal which is coupled to the pad terminal through a voltage feedback circuit.
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