发明授权
US6130556A Integrated circuit I/O buffer with 5V well and passive gate voltage
失效
具有5V阱和无源栅极电压的集成电路I / O缓冲器
- 专利标题: Integrated circuit I/O buffer with 5V well and passive gate voltage
- 专利标题(中): 具有5V阱和无源栅极电压的集成电路I / O缓冲器
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申请号: US98099申请日: 1998-06-16
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公开(公告)号: US6130556A公开(公告)日: 2000-10-10
- 发明人: Jonathan Schmitt , Gary Hom , Luong Hung
- 申请人: Jonathan Schmitt , Gary Hom , Luong Hung
- 申请人地址: CA Milpitas
- 专利权人: LSI Logic Corporation
- 当前专利权人: LSI Logic Corporation
- 当前专利权人地址: CA Milpitas
- 主分类号: H03K19/003
- IPC分类号: H03K19/003 ; H03K19/0185
摘要:
An integrated circuit buffer includes a core output terminal, a pad terminal, a pad pull-down transistor, a pad pull-up transistor, a pull-down control circuit and a pull-up control circuit. The pad pull-down transistor and the pad pull-up transistor are coupled to the pad terminal and have pull-up and pull-down control terminals, respectively. The pull-down control circuit is coupled between the core output terminal and the pull-down control terminal. The pull-up control circuit is coupled between the core output terminal and the pull-up control terminal. A pull-up voltage protection transistor is coupled in series between the pad pull-up transistor and the pad terminal and has a control terminal which is coupled to the pad terminal through a voltage feedback circuit.
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