Invention Grant
- Patent Title: Electric potential shaping method for electroplating
- Patent Title (中): 电镀电位成形方法
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Application No.: US970120Application Date: 1997-11-13
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Publication No.: US6159354APublication Date: 2000-12-12
- Inventor: Robert J. Contolini , Jonathan Reid , Evan Patton , Jingbin Feng , Steve Taatjes , John Owen Dukovic
- Applicant: Robert J. Contolini , Jonathan Reid , Evan Patton , Jingbin Feng , Steve Taatjes , John Owen Dukovic
- Applicant Address: CA San Jose NY New York
- Assignee: Novellus Systems, Inc.,International Business Machines, Inc.
- Current Assignee: Novellus Systems, Inc.,International Business Machines, Inc.
- Current Assignee Address: CA San Jose NY New York
- Main IPC: C25D7/12
- IPC: C25D7/12 ; C25D5/00 ; C25D3/38 ; C25D5/20 ; C25D7/04
Abstract:
An apparatus for depositing an electrically conductive layer on the surface of a wafer comprises a flange. The flange has a cylindrical wall and an annulus attached to a first end of the cylindrical wall. The annulus shields the edge region of the wafer surface during electroplating reducing the thickness of the deposited electrically conductive layer on the edge region. Further, the cylindrical wall of the flange can be provided with a plurality of apertures adjacent the wafer allowing gas bubbles entrapped on the wafer surface to readily escape.
Public/Granted literature
- US4222294A Fastener tool socket retaining assembly Public/Granted day:1980-09-16
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