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    Method for fabricating an isolation region in a semiconductor substrate
    1.
    发明授权
    Method for fabricating an isolation region in a semiconductor substrate 失效
    在半导体衬底中制造隔离区域的方法

    公开(公告)号：US4876214A

    公开(公告)日：1989-10-24

    申请号：US201491

    申请日：1988-06-02

    申请人： Tadanori Yamaguchi ,  Evan Patton ,  Eric Lane ,  Simon Yu

    发明人： Tadanori Yamaguchi ,  Evan Patton ,  Eric Lane ,  Simon Yu

    IPC分类号： H01L21/3213 ,  H01L21/763

    CPC分类号： H01L21/32137 ,  H01L21/763

    摘要： An isolation region is fabricated in a silicon substrate by first forming a silicon dioxide insulating layer on the substrate. A silicon nitride mask layer and an oxide layer are then deposited on the insulating layer. The oxide, mask and insulating layers and the substrate are etched to form a trench in the substrate. A channel stopper is implanted in substrate below the trench and the oxide layer is then stripped. Thereafter, the trench surface is oxidized to extend the insulating layer into the trench. Next, the trench is partially filled with polysilicon material, the surface of which is initially oxidized to extend the insulating layer over the trench. The mask layer is etched back to expose portions of the insulating layer adjacent the trench. The upper surface of the polysilicon material in the trench and portions of the substrate beneath exposed portions of the insulating layer are further oxidized to thicken the insulating layer over the trench.

    摘要翻译： 通过首先在衬底上形成二氧化硅绝缘层，在硅衬底中制造隔离区。 然后在绝缘层上沉积氮化硅掩模层和氧化物层。 蚀刻氧化物，掩模和绝缘层以及衬底，以在衬底中形成沟槽。 通道阻挡件植入在沟槽下方的衬底中，然后剥离氧化物层。 此后，沟槽表面被氧化以将绝缘层延伸到沟槽中。 接下来，沟槽部分地填充有多晶硅材料，其表面最初被氧化以在沟槽上延伸绝缘层。 掩模层被回蚀以暴露与沟槽相邻的绝缘层的部分。 沟槽中的多晶硅材料的上表面和绝缘层暴露部分下方的衬底部分被进一步氧化，以使沟槽上的绝缘层变厚。

    Liquid detection end effector sensor and method of using the same
    2.
    发明申请
    Liquid detection end effector sensor and method of using the same 有权
    液体检测末端执行器传感器及其使用方法

    公开(公告)号：US20060169977A1

    公开(公告)日：2006-08-03

    申请号：US11371650

    申请日：2006-03-09

    申请人： Won Lee ,  Evan Patton

    发明人： Won Lee ,  Evan Patton

    IPC分类号： H01L23/58 ,  H01L21/66

    CPC分类号： H01L21/67742 ,  H01L21/67288 ,  Y10S414/135

    摘要： Liquid detection sensors are attached to both sides of a robotic arm end effector of a semiconductor wafer process system. The sensor mechanism or probe is situated on the front side and backside of the end effector, designed with electrical lines that are traced onto a polyester base material. The electrical lines are positioned in a serpentine formation. The high conductance of the sulfuric acid in the copper sulfate solution acts as the conductor between the traced lines. When the conductive liquid comes in contact with the traced lines, the lines short and the sensor activates or turns on.

    摘要翻译： 液体检测传感器连接到半导体晶片处理系统的机器人臂端部执行器的两侧。 传感器机构或探头位于末端执行器的前侧和后侧，设计有跟踪在聚酯基材上的电线。 电线定位在蛇形结构中。 硫酸铜溶液中硫酸的高电导作用在跟踪线之间的导体。 当导电液体与跟踪线接触时，线路短路，传感器激活或打开。

    Process for electroplating metals into microscopic recessed features
    6.
    发明申请
    Process for electroplating metals into microscopic recessed features 有权
    将金属电镀成微观凹陷特征的工艺

    公开(公告)号：US20060011483A1

    公开(公告)日：2006-01-19

    申请号：US11228712

    申请日：2005-09-16

    申请人： Steven Mayer ,  Vijay Bhaskaran ,  Evan Patton ,  Robert Jackson ,  Jonathan Reid

    发明人： Steven Mayer ,  Vijay Bhaskaran ,  Evan Patton ,  Robert Jackson ,  Jonathan Reid

    IPC分类号： C25D5/02

    CPC分类号： C25D3/02 ,  C25D3/38 ,  C25D5/022 ,  C25D5/18 ,  H01L21/2885 ,  H01L21/76877 ,  H05K3/423

    摘要： Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.

    摘要翻译： 描述了几种用于减少或减轻在电镀微观凹陷特征的内部区域中的接缝和/或空隙的形成的技术。 阴极极化用于减轻将电镀有种子层的基板引入电镀溶液中的有害影响。 还描述了扩散控制的电镀技术，以提供沟槽和通孔的自下而上的填充，从而避免由此侧壁一起生长以产生接缝/空隙。 还描述了初步电镀步骤，在特征的内表面上镀覆导电薄膜，导致特征底部具有足够的导电性，便于自底向上填充。

    Edge bevel removal of copper from silicon wafers
    8.
    发明授权
    Edge bevel removal of copper from silicon wafers 有权
    从硅晶片去除铜的边缘斜面

    公开(公告)号：US06309981B1

    公开(公告)日：2001-10-30

    申请号：US09557668

    申请日：2000-04-25

    申请人： Steven T. Mayer ,  Carl Russo ,  Evan Patton

    发明人： Steven T. Mayer ,  Carl Russo ,  Evan Patton

    IPC分类号： H01L2100

    CPC分类号： H01L21/76877 ,  C23F1/08 ,  H01L21/02063 ,  H01L21/32134 ,  H01L21/67051 ,  H01L21/6708

    摘要： Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems apply liquid etchant in a precise manner at the edge bevel region of the wafer under viscous flow conditions, so that the etchant is applied on to the front edge area and flows over the side edge and onto the back edge in a viscous manner. The etchant thus does not flow or splatter onto the active circuit region of the wafer.

    摘要翻译： 描述了用于从半导体晶片的边缘斜面区域去除金属的化学蚀刻方法和相关模块。 这些方法和系统在粘性​​流动条件下在晶片的边缘斜面区域以精确的方式施加液体腐蚀剂，使得蚀刻剂施加到前边缘区域上并且以粘性流过侧边缘并在后边缘上流动 方式。 因此，蚀刻剂不会流动或溅射到晶片的有源电路区域。