发明授权
US6160284A Semiconductor device with sidewall insulating layers in the capacitor
contact hole
失效
半导体存储器件,在电容器接触孔中具有侧壁绝缘层
- 专利标题: Semiconductor device with sidewall insulating layers in the capacitor contact hole
- 专利标题(中): 半导体存储器件,在电容器接触孔中具有侧壁绝缘层
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申请号: US687934申请日: 1996-07-29
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公开(公告)号: US6160284A公开(公告)日: 2000-12-12
- 发明人: Atsushi Hachisuka , Takeshi Noguchi
- 申请人: Atsushi Hachisuka , Takeshi Noguchi
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX7-291386 19951109; JPX8-125616 19960521
- 主分类号: H01L23/52
- IPC分类号: H01L23/52 ; H01L21/3205 ; H01L21/768 ; H01L21/8242 ; H01L27/108 ; H01L29/76 ; H01L29/94 ; H01L31/119
摘要:
Source/drain regions of an MOS transistor are formed at a surface of a p-type silicon substrate. A storage node electrically connected to the source/drain regions penetrates a bit line to reach the n-type source/drain region. The storage node and the bit line are insulated from each other by a sidewall insulating layer. Thus, a semiconductor memory device suitable for high integration is obtained in which short-circuit between the storage node and the bit line on a gate electrode layer can be prevented.
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