发明授权
US6160286A Method for operation of a flash memory using n+/p-well diode
有权
使用n + / p-well二极管操作闪速存储器的方法
- 专利标题: Method for operation of a flash memory using n+/p-well diode
- 专利标题(中): 使用n + / p-well二极管操作闪速存储器的方法
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申请号: US422050申请日: 1999-10-20
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公开(公告)号: US6160286A公开(公告)日: 2000-12-12
- 发明人: Min-hwa Chi
- 申请人: Min-hwa Chi
- 申请人地址: TWX Hsinchu
- 专利权人: Worldwide Semiconductor Manufacturing Corporation
- 当前专利权人: Worldwide Semiconductor Manufacturing Corporation
- 当前专利权人地址: TWX Hsinchu
- 主分类号: G11C16/02
- IPC分类号: G11C16/02 ; H01L29/861 ; H01L29/78 ; H01L33/00
摘要:
A flash memory cell formed in a semiconductor substrate is disclosed. The cell includes a deep n-well formed within the substrate. Next, a p-well is formed within the deep n-well and a n+ drain region is formed within the p-well. A floating gate is formed above the p-well being separated from the substrate by a thin oxide layer. The floating gate is formed adjacent to the n+ drain region. Finally, a control gate is formed above the floating gate, the floating gate and the control gate being separated by a dielectric layer. The new cell is read by measuring the GIDL current at n+/p-well junction, which is exponentially modulated by the floating gate potential (or its net charge). The new cell is programmed by substrate hot electron injection and is erased by F-N tunneling through the overlap area of floating gate and p-well.
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