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US6160286A Method for operation of a flash memory using n+/p-well diode 有权
使用n + / p-well二极管操作闪速存储器的方法

Method for operation of a flash memory using n+/p-well diode
摘要:
A flash memory cell formed in a semiconductor substrate is disclosed. The cell includes a deep n-well formed within the substrate. Next, a p-well is formed within the deep n-well and a n+ drain region is formed within the p-well. A floating gate is formed above the p-well being separated from the substrate by a thin oxide layer. The floating gate is formed adjacent to the n+ drain region. Finally, a control gate is formed above the floating gate, the floating gate and the control gate being separated by a dielectric layer. The new cell is read by measuring the GIDL current at n+/p-well junction, which is exponentially modulated by the floating gate potential (or its net charge). The new cell is programmed by substrate hot electron injection and is erased by F-N tunneling through the overlap area of floating gate and p-well.
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