发明授权
US06432754B1 Double SOI device with recess etch and epitaxy 失效
具有凹陷蚀刻和外延的双重SOI器件

Double SOI device with recess etch and epitaxy
摘要:
The present invention provides various methods for forming a ground-plane SOI device which comprises at least a field effect transistor formed on a top Si-containing surface of a silicon-on-insulator (SOI) wafer; and an oxide region present beneath the field effect transistor, located in an area between source and drain regions which are formed in said SOI wafer, said oxide region is butted against shallow extensions formed in said SOI wafer, and is laterally adjacent to said source and drain regions.
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