发明授权
- 专利标题: Double SOI device with recess etch and epitaxy
- 专利标题(中): 具有凹陷蚀刻和外延的双重SOI器件
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申请号: US09788979申请日: 2001-02-20
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公开(公告)号: US06432754B1公开(公告)日: 2002-08-13
- 发明人: Fariborz Assaderaghi , Tze-Chiang Chen , K. Paul Muller , Edward Joseph Nowak , Devendra Kumar Sadana , Ghavam G. Shahidi
- 申请人: Fariborz Assaderaghi , Tze-Chiang Chen , K. Paul Muller , Edward Joseph Nowak , Devendra Kumar Sadana , Ghavam G. Shahidi
- 主分类号: H01L2100
- IPC分类号: H01L2100
摘要:
The present invention provides various methods for forming a ground-plane SOI device which comprises at least a field effect transistor formed on a top Si-containing surface of a silicon-on-insulator (SOI) wafer; and an oxide region present beneath the field effect transistor, located in an area between source and drain regions which are formed in said SOI wafer, said oxide region is butted against shallow extensions formed in said SOI wafer, and is laterally adjacent to said source and drain regions.
公开/授权文献
- US20020115240A1 DOUBLE SOI DEVICE WITH RECESS ETCH AND EPITAXY 公开/授权日:2002-08-22
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