Invention Grant
- Patent Title: Frequency multiplier without spurious oscillation
- Patent Title (中): 倍频器无杂散振荡
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Application No.: US09793695Application Date: 2001-02-27
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Publication No.: US06529051B2Publication Date: 2003-03-04
- Inventor: Tsuneo Tokumitsu , Osamu Baba
- Applicant: Tsuneo Tokumitsu , Osamu Baba
- Priority: JP2000-057930 20000229
- Main IPC: H03B1900
- IPC: H03B1900

Abstract:
A damping resistance 20 is connected between the drain D of an FET 10 and a first end T3 of an output transmission line 13, and a damping resistance 21 is connected between the drain D of an FET 11 and the first end T3. The source of the FET 10 and the gate of the FET 11 are connected to a ground plane on the back surface of a substrate through a via which has a parasitic inductance when a multiplied frequency exceeds 20 GHz. The gate of the FET 10 and the source of the FET 11 receive microwaves of the same frequency and phase through an input transmission line 12.
Public/Granted literature
- US20010017556A1 Frequency multiplier without spurious oscillation Public/Granted day:2001-08-30
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