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公开(公告)号：US08797101B2
公开(公告)日：2014-08-05
申请号：US13554189
申请日：2012-07-20
Applicant: Masaki Imagawa , Tsuneo Tokumitsu
Inventor： Masaki Imagawa , Tsuneo Tokumitsu
IPC: H03F3/191
CPC classification number: H03F3/193 , H03F1/223 , H03F2200/411
Abstract: A high frequency amplifier circuit includes a first transistor that has a first terminal, a second terminal and a control terminal, the first terminal being grounded, a second transistor that has a first terminal, a second terminal and a control terminal, the control terminal of the second transistor being coupled to the second terminal of the first transistor, the first terminal of the second transistor being coupled to only the second terminal of the first transistor with respect to high frequency wave, the second terminal of the second transistor being coupled to a direct-current power supply, and a first resistor of which first terminal is coupled to a node between the second terminal of the first transistor and the control terminal of the second transistor, and of which second terminal is coupled to the first terminal of the second transistor.
Abstract translation: 高频放大器电路包括具有第一端子，第二端子和控制端子的第一晶体管，第一端子接地，具有第一端子，第二端子和控制端子的第二晶体管，控制端子 所述第二晶体管耦合到所述第一晶体管的所述第二端子，所述第二晶体管的所述第一端子相对于高频波只耦合到所述第一晶体管的第二端子，所述第二晶体管的第二端子耦合到 直流电源和第一电阻器，其第一端子耦合到第一晶体管的第二端子和第二晶体管的控制端子之间的节点，并且其中第二端子耦合到第二晶体管的第一端子 晶体管。
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公开(公告)号：US08264279B2
公开(公告)日：2012-09-11
申请号：US13013291
申请日：2011-01-25
Applicant: Osamu Anegawa , Osamu Baba , Miki Kubota , Tsuneo Tokumitsu
Inventor： Osamu Anegawa , Osamu Baba , Miki Kubota , Tsuneo Tokumitsu
CPC classification number: H03F3/601 , H03F2200/405 , H03F2200/411
Abstract: An electronic circuit includes a first transistor having a first terminal grounded, a second transistor having a control terminal coupled with a second terminal of the first transistor, a first terminal grounded via a first capacitor, and a second terminal to which a DC power supply is connected, a first distributed constant line having one end connected to a first node between the second terminal of the first transistor and the control terminal of the second transistor and another end grounded via a second capacitor, a second distributed constant line having one end connected to the second terminal of the first transistor and another end connected to the first node, a third distributed constant line having one end connected to the control terminal of the second transistor and another end connected to the first node, a resistor connected between a second node between the first line and the second capacitor and a third node between the first terminal of the second transistor and the first capacitor, and a path that connects the third node and the second terminal of the first transistor via the first line and the resistor in a DC circuit operation.
Abstract translation: 电子电路包括第一晶体管，其第一端接地，第二晶体管，具有与第一晶体管的第二端耦合的控制端，通过第一电容接地的第一端和直流电源的第二端 连接的第一分布常数线，其一端连接到第一晶体管的第二端子与第二晶体管的控制端子之间的第一节点，另一端经由第二电容器接地;第二分布常数线路，其一端连接到 第一晶体管的第二端子和连接到第一节点的另一端，第三分布常数线路，其一端连接到第二晶体管的控制端子，另一端连接到第一节点，电阻器连接在第二节点之间， 第一线路和第二电容器以及第二晶体管的第一端子与冷杉之间的第三节点 以及在直流电路操作中经由第一线连接第一晶体管的第三节点和第二端子和电阻器的路径。
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公开(公告)号：US20110241739A1
公开(公告)日：2011-10-06
申请号：US13076871
申请日：2011-03-31
Applicant: Osamu Anegawa , Osamu Baba , Miki Kubota , Tsuneo Tokumitsu
Inventor： Osamu Anegawa , Osamu Baba , Miki Kubota , Tsuneo Tokumitsu
IPC: H03B19/14
CPC classification number: H03D7/1441 , H03C2200/0033 , H03D7/1433 , H03D7/1466 , H03D7/1475 , H03D7/1483 , H03D2200/0023
Abstract: A circuit includes: a first line to which input and output signal terminals are connected; a first transistor having a first terminal connected to the first line, a second terminal connected to a ground potential, and a control terminal supplied with a first oscillation signal, the first transistor outputting the first signal and its harmonic component; a second transistor having a first terminal connected to the first line, a second terminal connected to the ground potential, and a control terminal supplied with a second oscillation signal, the second transistor outputting the second signal and its harmonic component; a first harmonic generator connected to the control terminal of the first transistor and generates a harmonic component including the harmonic component by the first transistor; and a second harmonic generator connected to the control terminal of the second transistor and generates a harmonic component including the harmonic component by the second transistor.
Abstract translation: 电路包括：连接输入和输出信号端子的第一行; 第一晶体管，其具有连接到第一线的第一端子，连接到地电位的第二端子和被提供有第一振荡信号的控制端子，所述第一晶体管输出第一信号及其谐波分量; 第二晶体管，其具有连接到第一线的第一端子，连接到地电位的第二端子和被提供有第二振荡信号的控制端子，所述第二晶体管输出第二信号及其谐波分量; 连接到第一晶体管的控制端的一次谐波发生器，并产生包括第一晶体管的谐波分量的谐波分量; 以及连接到第二晶体管的控制端子的二次谐波发生器，并且通过第二晶体管产生包括谐波分量的谐波分量。
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公开(公告)号：US06529051B2
公开(公告)日：2003-03-04
申请号：US09793695
申请日：2001-02-27
Applicant: Tsuneo Tokumitsu , Osamu Baba
Inventor： Tsuneo Tokumitsu , Osamu Baba
IPC: H03B1900
CPC classification number: H03B19/00
Abstract: A damping resistance 20 is connected between the drain D of an FET 10 and a first end T3 of an output transmission line 13, and a damping resistance 21 is connected between the drain D of an FET 11 and the first end T3. The source of the FET 10 and the gate of the FET 11 are connected to a ground plane on the back surface of a substrate through a via which has a parasitic inductance when a multiplied frequency exceeds 20 GHz. The gate of the FET 10 and the source of the FET 11 receive microwaves of the same frequency and phase through an input transmission line 12.
Abstract translation: 阻尼电阻20连接在FET10的漏极D和输出传输线13的第一端T3之间，阻尼电阻21连接在FET 11的漏极D和第一端T3之间。 FET10的源极和FET11的栅极通过在倍频超过20GHz时具有寄生电感的通孔连接到衬底的背面上的接地面。 FET10的栅极和FET11的源极通过输入传输线12接收相同频率和相位的微波。
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公开(公告)号：US08543078B2
公开(公告)日：2013-09-24
申请号：US13076871
申请日：2011-03-31
Applicant: Osamu Anegawa , Osamu Baba , Miki Kubota , Tsuneo Tokumitsu
Inventor： Osamu Anegawa , Osamu Baba , Miki Kubota , Tsuneo Tokumitsu
IPC: H04B1/40
CPC classification number: H03D7/1441 , H03C2200/0033 , H03D7/1433 , H03D7/1466 , H03D7/1475 , H03D7/1483 , H03D2200/0023
Abstract: A circuit includes: a first line to which input and output signal terminals are connected; a first transistor having a first terminal connected to the first line, a second terminal connected to a ground potential, and a control terminal supplied with a first oscillation signal, the first transistor outputting the first signal and its harmonic component; a second transistor having a first terminal connected to the first line, a second terminal connected to the ground potential, and a control terminal supplied with a second oscillation signal, the second transistor outputting the second signal and its harmonic component; a first harmonic generator connected to the control terminal of the first transistor and generates a harmonic component including the harmonic component by the first transistor; and a second harmonic generator connected to the control terminal of the second transistor and generates a harmonic component including the harmonic component by the second transistor.
Abstract translation: 电路包括：连接输入和输出信号端子的第一行; 第一晶体管，其具有连接到第一线的第一端子，连接到地电位的第二端子和被提供有第一振荡信号的控制端子，所述第一晶体管输出第一信号及其谐波分量; 第二晶体管，其具有连接到第一线的第一端子，连接到地电位的第二端子和被提供有第二振荡信号的控制端子，所述第二晶体管输出第二信号及其谐波分量; 连接到第一晶体管的控制端的一次谐波发生器，并产生包括第一晶体管的谐波分量的谐波分量; 以及连接到第二晶体管的控制端子的二次谐波发生器，并且通过第二晶体管产生包括谐波分量的谐波分量。
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Patent Agency Ranking
公开(公告)号：US20120075003A1
公开(公告)日：2012-03-29
申请号：US13242208
申请日：2011-09-23
Applicant: Seiji Fujita , Tsuneo Tokumitsu
Inventor： Seiji Fujita , Tsuneo Tokumitsu
IPC: H03K17/687
CPC classification number: H03K19/0019
Abstract: An electronic circuit includes: first through third transistors having a control terminal, first and second terminals; a first direct current path supplying a direct current having passed through between the first terminal and the second terminal of at least one of the second transistor and the third transistor to the second terminal of the transistor at former position compared to the transistor through which the direct current passed; a second direct current path that is different from the first direct current path and supplies a direct current having passed through between the first terminal and the second terminal of at least one of the second transistor and the third transistor to the second terminal of the transistor at former position compared to the transistor through which the direct current passed; and a common coupling point coupling the first direct current path and the second direct current path in common.
Abstract translation: 电子电路包括：具有控制端子的第一到第三晶体管，第一和第二端子; 第一直流电路，将直流电流提供给第二晶体管和第三晶体管中的至少一个的第一端子和第二端子之间的直流电流，与直流晶体管的晶体管相比，在前一位置处的晶体管的第二端子， 当前通过; 第二直流路径，其不同于第一直流路径，并且将在第二晶体管和第三晶体管中的至少一个的第一端子和第二端子之间穿过的直流电流提供给晶体管的第二端子， 原来的位置与直流通过的晶体管相比; 以及共同耦合第一直流路径和第二直流路径的公共耦合点。
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公开(公告)号：US5661437A
公开(公告)日：1997-08-26
申请号：US514381
申请日：1995-08-11
Applicant: Kenjiro Nishikawa , Tsuneo Tokumitsu
Inventor： Kenjiro Nishikawa , Tsuneo Tokumitsu
CPC classification number: H03F1/34 , H03F1/342 , H03G1/007 , H03F2200/151
Abstract: A variable gain amplifier circuit in which a feedback circuit that feeds back the output signal of an amplifier from its output terminal to its input terminal is composed of an FET. The gate terminal of the feedback FET is connected to the output terminal of the amplifier through a capacitor, and the source terminal of the feedback FET is connected to the input terminal of the amplifier. The gain of the amplifying circuit is controlled by varying the transconductance of the feedback FET by controlling a bias voltage applied to the gate or drain terminal of the feedback FET. This makes it possible to control the gain independently of the physical dimension of the feedback FET, and at the same time, to prevent the input signal from being transmitted from the input side to the output side through the feedback circuit.
Abstract translation: 一种可变增益放大器电路，其中反馈电路将放大器的输出信号从其输出端子反馈到其输入端子由FET组成。 反馈FET的栅极端子通过电容器连接到放大器的输出端子，反馈FET的源极端子连接到放大器的输入端子。 通过控制施加到反馈FET的栅极或漏极端子的偏置电压来改变反馈FET的跨导来控制放大电路的增益。 这使得可以独立于反馈FET的物理尺寸来控制增益，并且同时防止输入信号通过反馈电路从输入侧传输到输出侧。
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8.发明授权Multilayer transmission line using ground metal with slit, and hybrid using the transmission line 失效多层传输线采用接地金属切缝，并采用传输线混合使用
公开(公告)号：US5634208A
公开(公告)日：1997-05-27
申请号：US622044
申请日：1996-03-26
Applicant: Kenjiro Nishikawa , Ichihiko Toyoda , Tsuneo Tokumitsu , Kenji Kamogawa
Inventor： Kenjiro Nishikawa , Ichihiko Toyoda , Tsuneo Tokumitsu , Kenji Kamogawa
CPC classification number: H01P3/088 , H05K1/0237 , H05K1/0298
Abstract: A hybrid including a substrate, a first dielectric layer, a ground metal, and a second dielectric layer, which are stacked in this order. Transmission lines are formed below and above the ground metal, and a slit is formed in the ground metal at a position corresponding to projection of the transmission lines onto the ground metal. The substrate has a greater dielectric constant than the dielectric layers. This makes it possible to prevent coupling between the upper and lower transmission lines, thereby implementing a high impedance, low loss transmission lines.
Abstract translation: 包括依次层叠的基板，第一电介质层，接地金属和第二电介质层的混合体。 传输线形成在接地金属的下方和上方，并且在对应于传输线投影到接地金属上的位置处，在接地金属中形成狭缝。 衬底具有比介电层更大的介电常数。 这使得可以防止上下传输线之间的耦合，从而实现高阻抗，低损耗传输线。
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公开(公告)号：US20130021102A1
公开(公告)日：2013-01-24
申请号：US13554189
申请日：2012-07-20
Applicant: Masaki IMAGAWA , Tsuneo TOKUMITSU
Inventor： Masaki IMAGAWA , Tsuneo TOKUMITSU
IPC: H03F3/193
CPC classification number: H03F3/193 , H03F1/223 , H03F2200/411
Abstract: A high frequency amplifier circuit includes a first transistor that has a first terminal, a second terminal and a control terminal, the first terminal being grounded, a second transistor that has a first terminal, a second terminal and a control terminal, the control terminal of the second transistor being coupled to the second terminal of the first transistor, the first terminal of the second transistor being coupled to only the second terminal of the first transistor with respect to high frequency wave, the second terminal of the second transistor being coupled to a direct-current power supply, and a first resistor of which first terminal is coupled to a node between the second terminal of the first transistor and the control terminal of the second transistor, and of which second terminal is coupled to the first terminal of the second transistor.
Abstract translation: 高频放大器电路包括具有第一端子，第二端子和控制端子的第一晶体管，第一端子接地，具有第一端子，第二端子和控制端子的第二晶体管，控制端子 所述第二晶体管耦合到所述第一晶体管的所述第二端子，所述第二晶体管的所述第一端子相对于高频波只耦合到所述第一晶体管的第二端子，所述第二晶体管的第二端子耦合到 直流电源和第一电阻器，其第一端子耦合到第一晶体管的第二端子和第二晶体管的控制端子之间的节点，并且其中第二端子耦合到第二晶体管的第一端子 晶体管。
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公开(公告)号：US20080048764A1
公开(公告)日：2008-02-28
申请号：US11878707
申请日：2007-07-26
Applicant: Tsuneo Tokumitsu , Osamu Baba
Inventor： Tsuneo Tokumitsu , Osamu Baba
IPC: G05F1/10
CPC classification number: H03B19/14 , H03B7/00 , H03B7/06 , H03B7/14 , H03B2200/0062
Abstract: An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.
Abstract translation: 电子电路装置包括负电阻发生电路，第二晶体管和路径。 负电阻产生电路具有第一晶体管，其具有耦合到谐振器的控制端。 第二晶体管具有耦合到第一晶体管的输出端子的控制端子，并且具有耦合到DC偏置端子的输出端子。 该路径通过第二晶体管耦合到DC偏置端子与第一晶体管的输出端子之间，并向第一晶体管提供偏置。
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