- 专利标题: Semiconductor device with a tapered hole formed using multiple layers with different etching rates
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申请号: US10125954申请日: 2002-04-18
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公开(公告)号: US06593235B2公开(公告)日: 2003-07-15
- 发明人: Hideki Uochi , Masahiko Hayakawa , Mitsunori Sakama , Toshimitsu Konuma , Shunpei Yamazaki
- 申请人: Hideki Uochi , Masahiko Hayakawa , Mitsunori Sakama , Toshimitsu Konuma , Shunpei Yamazaki
- 优先权: JP7-176801 19950620; JP8-20540 19960110
- 主分类号: H01L2144
- IPC分类号: H01L2144
摘要:
A semiconductor device having an improved contact hole through an interlayer insulator. A first insulating film comprising silicon nitride is deposited. A second insulating film comprising silicon oxide is deposited on the first insulating film. The deposition condition of the second insulating film is varied during the deposition so that the etching rate of the second insulating film increases from a lower portion toward an upper portion. Thereby, a contact hole which is formed by etching through the first and second insulating films has a tapered configuration to improve a reliability of a connection made therein.
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