Invention Grant
- Patent Title: Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication
- Patent Title (中): 栅电极和高k电介质层的界面层及其制造方法
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Application No.: US10038410Application Date: 2002-01-02
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Publication No.: US06620713B2Publication Date: 2003-09-16
- Inventor: Reza Arghavani , Robert Chau , Mark Doczy , Brian Roberds
- Applicant: Reza Arghavani , Robert Chau , Mark Doczy , Brian Roberds
- Main IPC: H01L213205
- IPC: H01L213205

Abstract:
Method of fabricating a semiconductor device. The semiconductor device comprises a substrate, a high-k gate dielectric layer formed on the substrate, and a hydrogen-free gate electrode deposited on the high-k gate dielectric layer wherein the hydrogen-free gate electrode is conductive. The method comprises depositing the high-k gate dielectric layer on the substrate, sputtering the gate electrode on the gate dielectric layer and treating the gate electrode such that the gate electrode is conductive.
Public/Granted literature
- US20030124871A1 Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication Public/Granted day:2003-07-03
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