A multichip assembly includes semiconductor devices or semiconductor device components with outer connectors on peripheral edges thereof. The outer connectors are formed by creating via holes along boundary lines between adjacent, unsevered semiconductor devices, or semiconductor device components, then plating or filling the holes with conductive material. When adjacent semiconductor devices or semiconductor device components are severed from one another, the conductive material in each via between the semiconductor devices is bisected. The semiconductor devices and components of the multichip assembly may have different sizes, as well as arrays of outer connectors with differing diameters and pitches. Either or both ends of each outer connector may be electrically connected to another aligned outer connector or contact area of another semiconductor device or component. Assembly in this manner provides a low-profile stacked assembly.