发明授权
- 专利标题： Photomask and pattern forming method used in a thermal flow process and semiconductor integrated circuit fabricated using the thermal flow process
- 专利标题（中）： 用于热流程的光掩模和图案形成方法以及使用热流程制造的半导体集成电路
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申请号： US10341160申请日： 2003-01-13
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公开(公告)号： US06864021B2公开(公告)日： 2005-03-08
- 发明人: Haruo Iwasaki , Shinji Ishida , Tsuyoshi Yoshii
- 申请人： Haruo Iwasaki , Shinji Ishida , Tsuyoshi Yoshii
- 申请人地址： JP
- 专利权人： NEC Electronics Corporation
- 当前专利权人： NEC Electronics Corporation
- 当前专利权人地址： JP
- 代理商 Hayes Soloway P.C.
- 优先权： JP2000-002582 20000111
- 主分类号： G03F1/00
- IPC分类号： G03F1/00 ; G03F1/68 ; G03F1/70 ; G03F7/20 ; G03F7/40 ; H01L21/027 ; H01L21/28 ; H01L21/311 ; G03F9/00
摘要：
The invention relates to a photomask for use in a thermal flow process in which: a photomask is prepared in which a plurality of exposure openings are formed; a resist is applied to the surface of a layer of a semiconductor integrated circuit that is to undergo processing; this resist is patterned by an exposure process through the photomask to form a plurality of openings in the resist that correspond to each of the exposure openings; and the patterned resist is then heated to cause each of the openings to shrink; wherein at least a portion of exposure openings among the plurality of exposure openings are formed in shapes that compensate for anisotropic deformation that occurs in the openings when the patterned resist is heated to cause each of the openings to shrink. Since the openings that are formed in the resist are provided in advance with shapes that compensate for the deformation that occurs when the openings shrink, these openings attain the proper shape after undergoing shrinking and deformation.
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