Invention Grant
US06897801B2 High-speed, high-resolution and low-consumption analog/digital converter with single-ended input
有权
具有单端输入的高速,高分辨率和低功耗模拟/数字转换器
- Patent Title: High-speed, high-resolution and low-consumption analog/digital converter with single-ended input
- Patent Title (中): 具有单端输入的高速,高分辨率和低功耗模拟/数字转换器
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Application No.: US10483790Application Date: 2002-06-13
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Publication No.: US06897801B2Publication Date: 2005-05-24
- Inventor: Pierangelo Confalonieri , Marco Zamprogno , Angelo Nagari
- Applicant: Pierangelo Confalonieri , Marco Zamprogno , Angelo Nagari
- Applicant Address: IT Agrate
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate
- Agency: Seed IP Law Group PLLC
- Agent Lisa K. Jorgenson; E. Russell Tarleton
- Priority: ITRM2001A0407 20010710
- International Application: PCTEP02/06487 WO 20020613
- International Announcement: WO0300747 WO 20030123
- Main IPC: H03M1/06
- IPC: H03M1/06 ; H03M1/46 ; H03M1/80 ; H03M1/12 ; G06F7/64 ; G06G7/18 ; G06G7/19

Abstract:
An A/D converter having capacitors of a first array of sampling capacitors weighted in binary code connected between a first common circuit node and an input terminal to be charged to an input voltage with respect to a ground of a signal to be converted, and in accordance with SAR technique are then selectively connected with two differential reference terminals, and at the same time capacitors of a second array equal to the first and all connected to a second node are selectively connected to ground and the lower differential voltage terminal. The two nodes are connected to the respective inputs of a comparator. A logic unit controls the connections of the capacitors of the two arrays in accordance with a predetermined timing program and as a function of the output of the comparator.
Public/Granted literature
- US20040233093A1 High-speed, high-resolution and low-consumption analog/digital converter with single-ended input Public/Granted day:2004-11-25
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