- Patent Title: Low-power high-performance integrated circuit and related methods
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Application No.: US10729726Application Date: 2003-12-05
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Publication No.: US06900690B2Publication Date: 2005-05-31
- Inventor: Sung-Mo Kang , Seung-Moon Yoo
- Applicant: Sung-Mo Kang , Seung-Moon Yoo
- Applicant Address: US CA Oakland
- Assignee: The Regents of the University of California
- Current Assignee: The Regents of the University of California
- Current Assignee Address: US CA Oakland
- Agency: Morrison & Foerster LLP
- Main IPC: H03K3/012
- IPC: H03K3/012 ; H03K19/00 ; G05F1/10

Abstract:
An integrated circuit is provided which includes a multi-state circuit with a first PMOS transistor and a first NMOS transistor. In an active mode, the multi-state circuit is operable to switch between a first state in which the first PMOS transistor is turned on and the first NMOS transistor is turned off and a second state in which the first PMOS transistor is turned off and the first NMOS transistor is turned on. A power source NMOS transistor has a drain connected to a supply voltage terminal and has a source connected to a source of the first PMOS transistor. A power source PMOS transistor has a drain connected to a an effective ground terminal and has a source connected to a source of the first NMOS transistor.
Public/Granted literature
- US20040113672A1 Low-power high-performance integrated circuit and related methods Public/Granted day:2004-06-17
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