Invention Grant
- Patent Title: Logarithmic digital to analog converter having multipliers coupled to reference voltages
- Patent Title (中): 具有耦合到参考电压的乘法器的对数数模转换器
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Application No.: US10611263Application Date: 2003-07-02
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Publication No.: US06900751B2Publication Date: 2005-05-31
- Inventor: Masami Yakabe
- Applicant: Masami Yakabe
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Barnes & Thornburg LLP
- Priority: JP2000-34874 20000214
- Main IPC: H03M1/36
- IPC: H03M1/36 ; H03M1/66 ; H03M1/62 ; H03M1/84 ; H03M1/88

Abstract:
An analog multiplier 11 raises a base reference voltage “Vref0” to the nth power so that a reference voltage “Vref1” is produced. Analog multipliers 12 and 13 sequentially raise the reference voltage “Vref1” to the nth power so that reference voltages “Vref2” and “Vref3” are produced. Switch groups 38-41 control the reference voltages “Vref0” to “Vref3”, which are then sent to an analog multiplier 14 together with an input voltage “Vin”. A comparator 14 sequentially compares a multiplication result “Vx” of the multiplier 14 with a voltage “Vout” outputted from a sensor circuit 2, so that a digital output value “Dout” is produced. The analog multiplier 14 is set as appropriate.
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