发明授权
US06940764B2 Memory with a bit line block and/or a word line block for preventing reverse engineering
失效
具有位线块和/或字线块的存储器用于防止逆向工程
- 专利标题： Memory with a bit line block and/or a word line block for preventing reverse engineering
- 专利标题（中）： 具有位线块和/或字线块的存储器用于防止逆向工程
-
申请号： US10451673申请日： 2002-03-12
-
公开(公告)号： US06940764B2公开(公告)日： 2005-09-06
- 发明人: William M. Clark, Jr. , James P. Baukus , Lap-Wai Chow
- 申请人： William M. Clark, Jr. , James P. Baukus , Lap-Wai Chow
- 申请人地址： US CA Malibu
- 专利权人： HRL Laboratories LLC
- 当前专利权人： HRL Laboratories LLC
- 当前专利权人地址： US CA Malibu
- 代理机构： Ladas & Parry LLP
- 国际申请： PCT/US02/07587 WO 20020312
- 国际公布： WO02/09119 WO 20021114
- 主分类号： G11C17/18
- IPC分类号： G11C17/18 ; G06F12/14 ; G11C7/12 ; G11C7/18 ; G11C7/24 ; G11C16/02 ; G11C16/22 ; H01L21/8246 ; H01L21/8247 ; H01L27/02 ; H01L27/10 ; H01L27/112 ; H01L27/115 ; G11C7/00
摘要：
A method and circuit for blocking unauthorized access to at least one memory cell in a semiconductor memory. The method includes providing a switch and/or a link which assumes an open state when access to the at least one memory cell is to be blocked; and coupling-a data line associated with the at least one memory cell to a constant voltage source in response to the switch or link assuming an open state.
公开/授权文献
信息查询
