Invention Grant
- Patent Title: Size checking method and apparatus
- Patent Title (中): 尺寸检查方法和装置
-
Application No.: US09883945Application Date: 2001-06-20
-
Publication No.: US06965687B2Publication Date: 2005-11-15
- Inventor: Eiji Sawa , Hiromu Inoue
- Applicant: Eiji Sawa , Hiromu Inoue
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- Priority: JP2000-186444 20000621
- Main IPC: G01B11/02
- IPC: G01B11/02 ; G01B11/24 ; G06T5/00 ; G06T7/00 ; G06T7/60 ; G06K9/00

Abstract:
A pair of edges that are located at ends as viewed in the widthwise direction of a design pattern are recognized. On the basis of the edge direction in which the paired edges are recognized, edge points on the design pattern are detected as sub-pixels. The widthwise dimension of the design pattern is calculated on the basis of the edge points. In addition, the widthwise dimension of a circuit pattern is calculated at the same position as the widthwise dimension of the design pattern. On the basis of the calculated widthwise dimensions, the semiconductor wafer circuit pattern is checked.
Public/Granted literature
- US20020028013A1 Size checking method and apparatus Public/Granted day:2002-03-07
Information query