Invention Grant
US06995483B2 Synchronous buck and boost regulator power reduction circuit using high side sensing 有权
同步降压和升压调节器功率降低电路采用高端感应

Synchronous buck and boost regulator power reduction circuit using high side sensing
Abstract:
A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal. The regulator includes an inductor, and a capacitor having one port connected to ground, and having a second port providing an output voltage of the DC-DC regulator. A driver is provided for driving pulses of current to the inductor when the high side pulsed signal is asserted. An undercurrent sense circuit is adapted to sense a driving current flowing through the driver and to assert a disable signal when the driving current is less than a predetermined amount. An enable/disable circuit is adapted to allow the low side pulsed signal to turn the switch on when the disable signal is not asserted, and to not allow the low side pulsed signals from turning the switch on when the disable signal is asserted.
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