- 专利标题: Tri-gate devices and methods of fabrication
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申请号: US10923472申请日: 2004-08-20
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公开(公告)号: US07005366B2公开(公告)日: 2006-02-28
- 发明人: Robert S. Chau , Brian S. Doyle , Jack Kavalieros , Douglas Barlage , Suman Datta , Scott A. Hareland
- 申请人: Robert S. Chau , Brian S. Doyle , Jack Kavalieros , Douglas Barlage , Suman Datta , Scott A. Hareland
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L21/3205
- IPC分类号: H01L21/3205 ; H01L21/4763
摘要:
The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.
公开/授权文献
- US20050199949A1 Tri-gate devices and methods of fabrication 公开/授权日:2005-09-15
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