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US07027339B2 Memory device employing open bit line architecture for providing identical data topology on repaired memory cell block and method thereof 失效
采用开放位线架构以在修复的存储单元块上提供相同数据拓扑的存储器件及其方法

Memory device employing open bit line architecture for providing identical data topology on repaired memory cell block and method thereof
摘要：
A memory device has at least one pair of memory cell blocks, a spare row decoder, a data exchange control signal generator and a data exchange unit. When a defective memory cell in a first memory cell block is repaired with a spare memory cell in a second memory cell block that neighbors (or is adjacent) the first memory cell block, the data topology of the memory cell of the first memory cell may be matched to the memory cell of the second memory cell block.
摘要（中）：

存储器件具有至少一对存储单元块，备用行解码器，数据交换控制信号发生器和数据交换单元。 当第一存储器单元块中的有缺陷的存储器单元用邻近（或相邻）第一存储器单元块的第二存储器单元块中的备用存储器单元修复时，第一存储器单元的存储单元的数据拓扑可以 与第二存储单元块的存储单元匹配。

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