Invention Grant
- Patent Title: Integrated circuit devices having buried insulation layers and methods of forming the same
- Patent Title (中): 具有掩埋绝缘层的集成电路器件及其形成方法
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Application No.: US10722193Application Date: 2003-11-26
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Publication No.: US07081391B2Publication Date: 2006-07-25
- Inventor: Byeong-chan Lee , Si-young Choi , Jong-ryeol Yoo , Yong-hoon Son , In-soo Jung , Deok-hyung Lee
- Applicant: Byeong-chan Lee , Si-young Choi , Jong-ryeol Yoo , Yong-hoon Son , In-soo Jung , Deok-hyung Lee
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec PA
- Priority: KR2002-73872 20021126; KR2003-41211 20030624
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
An integrated circuit device includes a gate electrode formed on an active region of an integrated circuit device and on a field isolation layer adjacent to the active region. A source region and a drain region are in the active region on alternate sides of the gate electrode. At least one buried insulation layer is beneath the drain region or the source region.
Public/Granted literature
- US20050179073A1 Integrated circuit devices having buried insulation layers and methods of forming the same Public/Granted day:2005-08-18
Information query
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