发明授权
US07122451B2 Method for fabricating a semiconductor device including exposing a group III-V semiconductor to an ammonia plasma
有权
一种用于制造半导体器件的方法，包括将III-V族半导体暴露于氨等离子体
- 专利标题： Method for fabricating a semiconductor device including exposing a group III-V semiconductor to an ammonia plasma
- 专利标题（中）： 一种用于制造半导体器件的方法，包括将III-V族半导体暴露于氨等离子体
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申请号： US10785944申请日： 2004-02-26
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公开(公告)号： US07122451B2公开(公告)日： 2006-10-17
- 发明人: Kaoru Inoue , Yoshito Ikeda , Yutaka Hirose , Katsunori Nishii
- 申请人： Kaoru Inoue , Yoshito Ikeda , Yutaka Hirose , Katsunori Nishii
- 申请人地址： JP Osaka
- 专利权人： Matsushita Electric Industrial Co., Ltd.
- 当前专利权人： Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址： JP Osaka
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2002-052727 20020228
- 主分类号： H01L21/26
- IPC分类号： H01L21/26 ; H01L21/28 ; H01L21/44
摘要：
A semiconductor device has an active region composed of a group III–V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.
公开/授权文献
- US20040175853A1 Semiconductor device and method for fabricating the same 公开/授权日：2004-09-09