公开(公告)号：US06770922B2

公开(公告)日：2004-08-03

申请号：US10372979

申请日：2003-02-26

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L2976

CPC分类号： H01L29/513 ,  H01L21/28264 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A semiconductor device has a first semiconductor layer composed of a group III-V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III-V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

摘要翻译： 半导体器件具有由III-V族氮化物构成的第一半导体层，通过氧化由位于第一半导体层的栅电极形成区域上的III-V族氮化物构成的第二半导体层而形成的氧化膜， 在氧化膜上形成的绝缘膜具有与氧化膜的组成不同的组成，以及形成在绝缘膜上的栅电极。

公开(公告)号：US07105907B2

公开(公告)日：2006-09-12

申请号：US10453045

申请日：2003-06-03

申请人： Yoshito Ikeda ,  Kaoru Inoue ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Yoshito Ikeda ,  Kaoru Inoue ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L27/095 ,  H01L29/47 ,  H01L29/812 ,  H01L31/0328 ,  H01L29/80

CPC分类号： H01L29/66871 ,  H01L29/2003 ,  H01L29/475 ,  H01L29/812

摘要： A buffer layer, an undoped gallium nitride layer, and an n-type gallium nitride active layer are formed on a sapphire substrate. Ohmic contacts and a Schottky contact are then formed on the n-type gallium nitride active layer as a source contact, a drain contact and a gate contact, respectively. The Schottky contact is a copper alloy, such as palladium copper, in which the content by weight of copper is 5%.

摘要翻译： 在蓝宝石衬底上形成缓冲层，未掺杂的氮化镓层和n型氮化镓活性层。 然后分别在作为源极接触，漏极接触和栅极接触的n型氮化镓有源层上形成欧姆接触和肖特基接触。 肖特基接触是铜合金，例如钯铜，其中铜的重量含量为5％。

公开(公告)号：US07122451B2

公开(公告)日：2006-10-17

申请号：US10785944

申请日：2004-02-26

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/26 ,  H01L21/28 ,  H01L21/44

CPC分类号： H01L29/66878 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/8126

摘要： A semiconductor device has an active region composed of a group III–V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

摘要翻译： 半导体器件具有由III-V族氮化物半导体和欧姆电极构成的有源区域和分别形成在有源区域上的栅电极。 有源区域的整个表面暴露于等离子体，使得其中的电子的表面电位低于整个表面不暴露于等离子体的情况。

公开(公告)号：US07037817B2

公开(公告)日：2006-05-02

申请号：US10889028

申请日：2004-07-13

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/4763

CPC分类号： H01L29/513 ,  H01L21/28264 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A semiconductor device has a first semiconductor layer composed of a group III–V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III–V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

公开(公告)号：US06737683B2

公开(公告)日：2004-05-18

申请号：US10372079

申请日：2003-02-25

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L310328

CPC分类号： H01L29/66878 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/8126

摘要： A semiconductor device has an active region composed of a group III-V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

摘要翻译： 半导体器件具有由III-V族氮化物半导体和欧姆电极构成的有源区域和分别形成在有源区域上的栅电极。 有源区域的整个表面暴露于等离子体，使得其中的电子的表面电位低于整个表面不暴露于等离子体的情况。

公开(公告)号：US07449399B2

公开(公告)日：2008-11-11

申请号：US11527695

申请日：2006-09-27

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/26

CPC分类号： H01L29/66878 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/8126

摘要： A semiconductor device has an active region composed of a group III-V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

摘要翻译： 半导体器件具有由III-V族氮化物半导体和欧姆电极构成的有源区域和分别形成在有源区域上的栅电极。 有源区域的整个表面暴露于等离子体，使得其中的电子的表面电位低于整个表面不暴露于等离子体的情况。

公开(公告)号：US20070020896A1

公开(公告)日：2007-01-25

申请号：US11527695

申请日：2006-09-27

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/26 ,  H01L21/28

CPC分类号： H01L29/66878 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/8126

摘要： A semiconductor device has an active region composed of a group III-V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

摘要翻译： 半导体器件具有由III-V族氮化物半导体和欧姆电极构成的有源区域和分别形成在有源区域上的栅电极。 有源区域的整个表面暴露于等离子体，使得其中的电子的表面电位低于整个表面不暴露于等离子体的情况。

公开(公告)号：US06933181B2

公开(公告)日：2005-08-23

申请号：US10620430

申请日：2003-07-17

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Katsunori Nishii ,  Yutaka Hirose

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Katsunori Nishii ,  Yutaka Hirose

IPC分类号： H01L21/316 ,  H01L21/335 ,  H01L29/20 ,  H01L29/778 ,  H01L21/00

CPC分类号： H01L29/66462 ,  H01L21/02178 ,  H01L21/02238 ,  H01L21/02241 ,  H01L21/02255 ,  H01L21/31662 ,  H01L21/31666 ,  H01L29/2003 ,  H01L29/7787 ,  Y10S148/113

摘要： In a method for fabricating a semiconductor device, a first semiconductor layer of aluminum gallium nitride is first formed on a substrate, and a protection film containing silicon is then formed on the first semiconductor layer in such a manner that a device-isolation region is uncovered. Thereafter, the method further includes the step of heat-treating the first semiconductor layer in an oxidizing atmosphere whose temperature is adjusted to be within a range of 950° C. or more and 1050° C. or less.

摘要翻译： 在制造半导体器件的方法中，首先在衬底上形成氮化镓铝的第一半导体层，然后在第一半导体层上形成包含硅的保护膜，使得器件隔离区域不被覆盖 。 此后，该方法还包括在温度调节在950℃以上且1050℃以下的氧化气氛中对第一半导体层进行热处理的工序。

公开(公告)号：US07585706B2

公开(公告)日：2009-09-08

申请号：US11898951

申请日：2007-09-18

申请人： Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

发明人： Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

IPC分类号： H01L21/336

CPC分类号： H01L29/66863 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7783

摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.

摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。

公开(公告)号：US06852612B2

公开(公告)日：2005-02-08

申请号：US10323637

申请日：2002-12-20

申请人： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

发明人： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

IPC分类号： H01L21/285 ,  H01L21/338 ,  H01L23/48 ,  H01L29/20 ,  H01L29/47 ,  H01L29/812 ,  H01L31/00 ,  H01L33/32 ,  H01L33/40 ,  H01L21/28

CPC分类号： H01L29/475 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/66856 ,  H01L29/66863 ,  H01L29/812 ,  H01L33/32 ,  H01L33/40

摘要： The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.

摘要翻译： 本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。