Invention Grant
- Patent Title: Method to avoid a laser marked area step height
- Patent Title (中): 避免激光标记区域步长的方法
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Application No.: US10761657Application Date: 2004-01-20
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Publication No.: US07172948B2Publication Date: 2007-02-06
- Inventor: Chin-Kun Fang , Kun-Pi Cheng , Wei-Jen Wu , Ching-Jiunn Huang , Chung-Jen Chen
- Applicant: Chin-Kun Fang , Kun-Pi Cheng , Wei-Jen Wu , Ching-Jiunn Huang , Chung-Jen Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Tung & Associates
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
A semiconductor process wafer having substantially co-planar active areas and a laser marked area in an adjacent inactive area and method for forming the same to eliminate a step height and improve a subsequent patterning process over the active areas wherein an inactive area trench is formed overlying the laser marked area in parallel with formation of STI trenches in the active area whereby the active areas and the inactive area are formed substantially co-planar without a step height.
Public/Granted literature
- US20050158966A1 Method to avoid a laser marked area step height Public/Granted day:2005-07-21
Information query
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