发明授权
- 专利标题: Manufacturing method of semiconductor device
- 专利标题(中): 半导体器件的制造方法
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申请号: US10814627申请日: 2004-04-01
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公开(公告)号: US07199022B2公开(公告)日: 2007-04-03
- 发明人: Kan Yasui , Toshiyuki Mine , Yasushi Goto , Natsuki Yokoyama
- 申请人: Kan Yasui , Toshiyuki Mine , Yasushi Goto , Natsuki Yokoyama
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Miles & Stockbridge PC
- 优先权: JP2003-098994 20030402
- 主分类号: H01L21/76
- IPC分类号: H01L21/76
摘要:
In order to achieve an isolation trench formation process according to the present invention in which the structure of a silicon nitride film liner can be easily controlled and to allow both of reduction of the device feature length and reduction in stress occurring in an isolation trench, the silicon nitride film liner is first deposited on the inner wall of the trench formed on a silicon substrate. The upper surface of a first embedded insulator film for filling the inside of the trench is recessed downward so as to expose an upper end portion of the silicon nitride film liner. Next, the exposed portion of the silicon nitride film liner is converted into non-silicon-nitride type insulator film, such as a silicon oxide film. A second embedded insulator film is then deposited on the upper portion of the first embedded insulator film, and the deposited surface is then planarized.
公开/授权文献
- US20040198019A1 Manufacturing method of semiconductor device 公开/授权日:2004-10-07
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