Manufacturing method of semiconductor device
    1.
    发明授权
    Manufacturing method of semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号:US07199022B2

    公开(公告)日:2007-04-03

    申请号:US10814627

    申请日:2004-04-01

    IPC分类号: H01L21/76

    CPC分类号: H01L21/76224 Y10S438/907

    摘要: In order to achieve an isolation trench formation process according to the present invention in which the structure of a silicon nitride film liner can be easily controlled and to allow both of reduction of the device feature length and reduction in stress occurring in an isolation trench, the silicon nitride film liner is first deposited on the inner wall of the trench formed on a silicon substrate. The upper surface of a first embedded insulator film for filling the inside of the trench is recessed downward so as to expose an upper end portion of the silicon nitride film liner. Next, the exposed portion of the silicon nitride film liner is converted into non-silicon-nitride type insulator film, such as a silicon oxide film. A second embedded insulator film is then deposited on the upper portion of the first embedded insulator film, and the deposited surface is then planarized.

    摘要翻译: 为了实现根据本发明的隔离沟槽形成方法,其中可以容易地控制氮化硅膜衬垫的结构并且允许器件特征长度的减小和在隔离沟槽中发生的应力的减小, 氮化硅膜衬垫首先沉积在形成在硅衬底上的沟槽的内壁上。 用于填充沟槽内部的第一嵌入式绝缘体膜的上表面向下凹入以暴露氮化硅膜衬垫的上端部分。 接下来,将氮化硅膜衬垫的露出部分转换成诸如氧化硅膜的非氮化硅型绝缘膜。 然后将第二嵌入式绝缘膜沉积在第一嵌入式绝缘膜的上部上,然后将沉积的表面平坦化。

    Nonvolatile semiconductor memory device and manufacturing method thereof
    2.
    发明授权
    Nonvolatile semiconductor memory device and manufacturing method thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US07115943B2

    公开(公告)日:2006-10-03

    申请号:US11013406

    申请日:2004-12-17

    IPC分类号: H01L29/792

    摘要: A MONOS nonvolatile memory of a split gate structure, wherein writing and erasing are performed by hot electrons and hot holes respectively, is prone to cause electrons not to be erased and to remain in an Si nitride film on a select gate electrode sidewall and that results in the deterioration of rewriting durability. When long time erasing is applied as a measure to solve the problem, drawbacks appear, such as the increase of a circuit area caused by the increase of the erasing current and the deterioration of retention characteristics. In the present invention, an Si nitride film is formed by the reactive plasma sputter deposition method that enables oriented deposition and the Si nitride film on a select gate electrode sidewall is removed at the time when a top Si oxide film is formed.

    摘要翻译: 分离栅结构的MONOS非易失性存储器,其中由热电子和热孔分别执行写入和擦除容易导致电子不被擦除并且保留在选择栅极电极侧壁上的氮化硅膜中,并且结果 在改写耐久性的恶化。 当长时间擦除作为解决该问题的措施时,会出现缺点,例如由擦除电流的增加引起的电路面积的增加和保留特性的劣化。 在本发明中,通过能够进行取向沉积的反应等离子体溅射沉积方法形成氮化硅膜,并且在形成顶部Si氧化物膜时,在选择栅电极侧壁上除去Si氮化物膜。

    Nonvolatile semiconductor memory device and manufacturing method thereof
    3.
    发明申请
    Nonvolatile semiconductor memory device and manufacturing method thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US20050199940A1

    公开(公告)日:2005-09-15

    申请号:US11013406

    申请日:2004-12-17

    摘要: A MONOS nonvolatile memory of a split gate structure, wherein writing and erasing are performed by hot electrons and hot holes respectively, is prone to cause electrons not to be erased and to remain in an Si nitride film on a select gate electrode sidewall and that results in the deterioration of rewriting durability. When long time erasing is applied as a measure to solve the problem, drawbacks appear, such as the increase of a circuit area caused by the increase of the erasing current and the deterioration of retention characteristics. In the present invention, an Si nitride film is formed by the reactive plasma sputter deposition method that enables oriented deposition and the Si nitride film on a select gate electrode sidewall is removed at the time when a top Si oxide film is formed.

    摘要翻译: 分离栅结构的MONOS非易失性存储器分别由热电子和热孔执行写入和擦除,容易导致电子不被擦除并且保留在选择栅电极侧壁上的氮化硅膜中,并且结果 在改写耐久性的恶化。 当长时间擦除作为解决该问题的措施时,会出现缺点,例如由擦除电流的增加引起的电路面积的增加和保留特性的劣化。 在本发明中,通过能够进行取向沉积的反应等离子体溅射沉积方法形成氮化硅膜,并且在形成顶部Si氧化物膜时,在选择栅电极侧壁上除去Si氮化物膜。

    MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions
    5.
    发明授权
    MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions 有权
    具有具有锥形端部的高介电常数绝缘膜的MISFET半导体器件

    公开(公告)号:US06710383B2

    公开(公告)日:2004-03-23

    申请号:US10005355

    申请日:2001-12-07

    IPC分类号: H01L2976

    摘要: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.

    摘要翻译: 提供如下配置的半导体器件。 在半导体衬底上形成作为绝缘膜的介电常数高于二氧化硅膜的氧化钛膜作为栅极绝缘膜,并且在其上设置栅电极,得到场效应晶体管。 氧化钛膜的栅极长度方向的端部位于栅电极的源极侧和漏极侧的各端部的内侧,氧化钛膜的端部位于 其中栅电极以平面构型与源区和漏区重叠。 该半导体器件以高速度工作,并且具有优异的短沟道特性和驱动电流。 此外,在半导体器件中,导入硅衬底的金属元素的量小。

    Semiconductor device and process for producing the same
    6.
    发明授权
    Semiconductor device and process for producing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US07193281B2

    公开(公告)日:2007-03-20

    申请号:US11296289

    申请日:2005-12-08

    IPC分类号: H01L29/76

    摘要: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.

    摘要翻译: 提供如下配置的半导体器件。 在半导体衬底上形成作为绝缘膜的介电常数高于二氧化硅膜的氧化钛膜作为栅极绝缘膜,并且在其上设置栅电极,得到场效应晶体管。 氧化钛膜的栅极长度方向的端部位于栅电极的源极侧和漏极侧的各端部的内侧,氧化钛膜的端部位于 其中栅电极以平面构型与源区和漏区重叠。 该半导体器件以高速度工作,并且具有优异的短沟道特性和驱动电流。 此外,在半导体器件中,导入硅衬底的金属元素的量小。

    Method of making a MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions
    7.
    发明授权
    Method of making a MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions 有权
    制造具有锥形端部的高介电常数绝缘膜的MISFET半导体器件的方法

    公开(公告)号:US06833296B2

    公开(公告)日:2004-12-21

    申请号:US10776215

    申请日:2004-02-12

    IPC分类号: H01L21336

    摘要: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.

    摘要翻译: 提供如下配置的半导体器件。 在半导体衬底上形成作为绝缘膜的介电常数高于二氧化硅膜的氧化钛膜作为栅极绝缘膜,并且在其上设置栅电极,得到场效应晶体管。 氧化钛膜的栅极长度方向的端部位于栅电极的源极侧和漏极侧的各端部的内侧,氧化钛膜的端部位于 其中栅电极以平面构型与源区和漏区重叠。 该半导体器件以高速度工作,并且具有优异的短沟道特性和驱动电流。 此外,在半导体器件中,导入硅衬底的金属元素的量小。

    Semiconductor device and method for manufacturing thereof
    10.
    发明授权
    Semiconductor device and method for manufacturing thereof 有权
    半导体装置及其制造方法

    公开(公告)号:US06897104B2

    公开(公告)日:2005-05-24

    申请号:US10452126

    申请日:2003-06-03

    摘要: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen-introduced silicon oxide film to expose the surface of the substrate and oxidizing the exposed surface of the silicon substrate and the silicon nitride film.

    摘要翻译: 一种半导体器件及其制造方法,其选择性地形成氮化硅膜,而不会对硅衬底的表面造成损害或污染,从而在一个相同的硅衬底中形成不同类型的栅极电介质,通过在二氧化硅上形成二氧化硅 硅衬底的表面,然后去除其一部分,在已经除去二氧化硅的衬底的表面上形成氮化硅膜,同时将氮引入二氧化硅的不是 去除或者通过化学气相沉积在硅衬底的表面上沉积二氧化硅,然后去除其一部分,在去除二氧化硅的衬底的表面上形成氮化硅膜,同时 将氮气引入未被除去的二氧化硅的表面,依次溶解 并且移除氮导入的氧化硅膜以暴露衬底的表面并氧化硅衬底和氮化硅膜的暴露表面。