Invention Grant
- Patent Title: Nonvolatile semiconductor memory and making method thereof
- Patent Title (中): 非易失性半导体存储器及其制造方法
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Application No.: US11005015Application Date: 2004-12-07
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Publication No.: US07268042B2Publication Date: 2007-09-11
- Inventor: Digh Hisamoto , Kan Yasui
- Applicant: Digh Hisamoto , Kan Yasui
- Applicant Address: JP Tokyo
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge
- Priority: JP2004-033297 20040210
- Main IPC: H01L21/8247
- IPC: H01L21/8247

Abstract:
A nonvolatile semiconductor memory device of a split gate structure having a gate of low resistance suitable to the arrangement of a memory cell array is provided. When being formed of a side wall spacer, a memory gate is formed of polycrystal silicon and then replaced with nickel silicide. Thus, its resistance can be lowered with no effect on the silicidation to the selection gate or the diffusion layer.
Public/Granted literature
- US20050176202A1 Nonvolatile semiconductor memory and making method thereof Public/Granted day:2005-08-11
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