发明授权
US07286069B1 Systems and methods for clock mode determination utilizing divide ratio testing
有权
使用分频比测试的时钟模式确定的系统和方法
- 专利标题: Systems and methods for clock mode determination utilizing divide ratio testing
- 专利标题(中): 使用分频比测试的时钟模式确定的系统和方法
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申请号: US11136215申请日: 2005-05-24
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公开(公告)号: US07286069B1公开(公告)日: 2007-10-23
- 发明人: Bruce Eliot Duewer , John Laurence Melanson , Kartik Nanda
- 申请人: Bruce Eliot Duewer , John Laurence Melanson , Kartik Nanda
- 申请人地址: US TX Austin
- 专利权人: Cirrus Logic, Inc.
- 当前专利权人: Cirrus Logic, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: Thompson & Knight LLP
- 代理商 James J. Murphy
- 主分类号: H03M1/00
- IPC分类号: H03M1/00
摘要:
A system for determining a data converter operating mode includes measurement circuitry for measuring master clock frequency of a master clock signal and a frequency ratio between a frequency of a data clock signal and the master clock frequency and a mapping system for mapping the measurement of the frequency ratio to an operating mode of the data converter. The mapping system generates a set of candidate divide ratios for dividing the master clock frequency to generate corresponding internal master clock frequencies of an internal clock signal and determines the lowest divide ratio which generates a supported internal master clock frequency. In an alternate embodiment, the mapping system determines the divide ratio required by a filter of the data converter by dividing the data clock to master clock frequency ratio by a data clock to internal clock frequency ratio between the data clock frequency and the frequency of an internal clock signal. In additional embodiments, the mapping system gives preference to natural number divide ratios during mode mapping.
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