Invention Grant
- Patent Title: Lock detect circuit for a phase locked loop
- Patent Title (中): 用于锁相环路的锁定检测电路
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Application No.: US11254569Application Date: 2005-10-20
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Publication No.: US07323946B2Publication Date: 2008-01-29
- Inventor: James D. Seefeldt , Bradley A. Kantor
- Applicant: James D. Seefeldt , Bradley A. Kantor
- Applicant Address: US NJ Morristown
- Assignee: Honeywell International Inc.
- Current Assignee: Honeywell International Inc.
- Current Assignee Address: US NJ Morristown
- Agency: McDonnell Boehnen Hulbert and Berghoff LLP
- Main IPC: H03L7/085
- IPC: H03L7/085 ; H03L7/08

Abstract:
An improved system and method for determining the lock condition of a Phase Locked Loop (PLL) is described. The lock detect circuit generates a fast lock detect signal that may be used to detect a transient loss of lock. The lock detect circuit may also include a phase alignment detect circuit to detect a misalignment in the phase of a reference clock and a feedback clock. Additionally, the lock detect circuit may include a reference clock detect circuit to detect if the reference clock signal is detected. Output signals from all of the above circuits may be communicated to a logic circuit in order to create an enhanced lock detect signal. An extended lock detect signal may also be communicated to the logic circuit.
Public/Granted literature
- US20070090887A1 Lock detect circuit for a phase locked loop Public/Granted day:2007-04-26
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