Invention Grant
- Patent Title: Method for forming a plated microvia interconnect
- Patent Title (中): 用于形成电镀微孔互连的方法
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Application No.: US10281463Application Date: 2002-10-25
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Publication No.: US07328506B2Publication Date: 2008-02-12
- Inventor: Miguel A. Jimarez , Ross W. Keesler , Voya R. Markovich , Rajinder S. Rai , Cheryl L. Tytran-Palomaki
- Applicant: Miguel A. Jimarez , Ross W. Keesler , Voya R. Markovich , Rajinder S. Rai , Cheryl L. Tytran-Palomaki
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Schmeiser, Olsen & Watts
- Agent William H. Steinberg
- Main IPC: H01K3/10
- IPC: H01K3/10

Abstract:
A method for forming a plated microvia interconnect. An external dielectric layer (EDL) is mounted on a surface of the substrate and is in direct mechanical contact with a conductive element included in the surface. An opening formed in the EDL exposes the conductive element and creates a microvia in the EDL. A sidewall and bottom wall surface of the microvia is treated to promote copper adhesion to the sidewall and bottom wall surfaces. The sidewall and bottom wall surfaces are plated to form a layer of copper thereon. The layer of copper is in direct mechanical and electrical contact with the conductive element. A wet solder paste deposited on the layer of copper overfills a remaining portion of the microvia. The solder paste is reflowed to form a solder bump in and over the remaining portion of the microvia to form the plated microvia interconnect.
Public/Granted literature
- US20030102158A1 Laminate having plated microvia interconnects and method for forming the same Public/Granted day:2003-06-05
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