发明授权
US07355221B2 Field effect transistor having an asymmetrically stressed channel region
有权
具有不对称应力通道区域的场效应晶体管
- 专利标题: Field effect transistor having an asymmetrically stressed channel region
- 专利标题(中): 具有不对称应力通道区域的场效应晶体管
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申请号: US10908448申请日: 2005-05-12
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公开(公告)号: US07355221B2公开(公告)日: 2008-04-08
- 发明人: Gregory G. Freeman , Anil K. Chinthakindi , David R. Greenberg , Basanth Jagannathan , Marwan H. Khater , John Pekarik , Xudong Wang
- 申请人: Gregory G. Freeman , Anil K. Chinthakindi , David R. Greenberg , Basanth Jagannathan , Marwan H. Khater , John Pekarik , Xudong Wang
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 Daryl K. Neff, Esq.; H. Daniel Schnurmann
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
A field effect transistor is provided which includes a contiguous single-crystal semiconductor region in which a source region, a channel region and a drain region are disposed. The channel region has an edge in common with the source region as a source edge, and the channel region further has an edge in common with the drain region as a drain edge. A gate conductor overlies the channel region. The field effect transistor further includes a structure which applies a stress at a first magnitude to only one of the source edge and the drain edge while applying the stress at no greater than a second magnitude to another one of the source edge and the drain edge, wherein the second magnitude has a value ranging from zero to about half the first magnitude. In a particular embodiment, the stress is applied at the first magnitude to the source edge while the zero or lower magnitude stress is applied to the drain edge. In another embodiment, the stress is applied at the first magnitude to the drain edge while the zero or lower magnitude stress is applied to the drain edge.
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