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    Field effect transistor having an asymmetrically stressed channel region
    1.
    发明授权
    Field effect transistor having an asymmetrically stressed channel region 有权
    具有不对称应力通道区域的场效应晶体管

    公开(公告)号：US07355221B2

    公开(公告)日：2008-04-08

    申请号：US10908448

    申请日：2005-05-12

    申请人： Gregory G. Freeman ,  Anil K. Chinthakindi ,  David R. Greenberg ,  Basanth Jagannathan ,  Marwan H. Khater ,  John Pekarik ,  Xudong Wang

    发明人： Gregory G. Freeman ,  Anil K. Chinthakindi ,  David R. Greenberg ,  Basanth Jagannathan ,  Marwan H. Khater ,  John Pekarik ,  Xudong Wang

    IPC分类号： H01L29/76

    CPC分类号： H01L21/26586 ,  H01L21/26506 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66659 ,  H01L29/7835 ,  H01L29/7843

    摘要： A field effect transistor is provided which includes a contiguous single-crystal semiconductor region in which a source region, a channel region and a drain region are disposed. The channel region has an edge in common with the source region as a source edge, and the channel region further has an edge in common with the drain region as a drain edge. A gate conductor overlies the channel region. The field effect transistor further includes a structure which applies a stress at a first magnitude to only one of the source edge and the drain edge while applying the stress at no greater than a second magnitude to another one of the source edge and the drain edge, wherein the second magnitude has a value ranging from zero to about half the first magnitude. In a particular embodiment, the stress is applied at the first magnitude to the source edge while the zero or lower magnitude stress is applied to the drain edge. In another embodiment, the stress is applied at the first magnitude to the drain edge while the zero or lower magnitude stress is applied to the drain edge.

    摘要翻译： 提供一种场效应晶体管，其包括其中设置有源极区，沟道区和漏极区的邻接单晶半导体区。 沟道区域具有与源极区域共同的边缘作为源极边缘，并且沟道区域还具有与作为漏极边缘的漏极区域共同的边缘。 栅极导体覆盖沟道区域。 场效应晶体管还包括将源极边缘和漏极边缘的另一个施加不大于第二幅度的应力的第一幅度的应力仅施加到源极边缘和漏极边缘中的一个的结构， 其中所述第二幅度具有从零到所述第一幅度的大约一半的值。 在特定实施例中，将应力以第一幅度施加到源极边缘，同时零或较小幅度应力施加到漏极边缘。 在另一个实施例中，将应力以第一幅度施加到漏极边缘，同时将零或较小的幅度应力施加到漏极边缘。

    Method of fabricating self-aligned bipolar transistor having tapered collector
    3.
    发明申请
    Method of fabricating self-aligned bipolar transistor having tapered collector 有权
    制造具有锥形集电极的自对准双极晶体管的方法

    公开(公告)号：US20080318373A1

    公开(公告)日：2008-12-25

    申请号：US12220521

    申请日：2008-07-25

    申请人： Hiroyuki Akatsu ,  Rama Divakaruni ,  Gregory G. Freeman ,  David R. Greenberg ,  Marwan H. Khater ,  William R. Tonti

    发明人： Hiroyuki Akatsu ,  Rama Divakaruni ,  Gregory G. Freeman ,  David R. Greenberg ,  Marwan H. Khater ,  William R. Tonti

    IPC分类号： H01L21/8238

    CPC分类号： H01L29/66242 ,  H01L29/0821 ,  H01L29/7378

    摘要： A method is provided for making a bipolar transistor which includes a tapered, i.e. frustum-shaped, collector pedestal having an upper substantially planar surface, a lower surface, and a slanted sidewall extending between the upper surface and the lower surface, the upper surface having substantially less area than the lower surface. The collector pedestal can be formed on a surface of a collector active region exposed within an opening extending through first and second overlying dielectric regions, where the opening defines vertically aligned edges of the first and second dielectric regions.

    摘要翻译： 提供了一种用于制造双极晶体管的方法，该双极晶体管包括锥形的，即截头锥形的收集器基座，其具有上部基本平坦的表面，下表面和在上表面和下表面之间延伸的倾斜侧壁，上表面具有 比下表面小得多的面积。 收集器基座可以形成在暴露在通过第一和第二覆盖介质区域延伸的开口内的集电极有源区域的表面上，其中开口限定第一和第二电介质区域的垂直对齐的边缘。

    Structure and method of self-aligned bipolar transistor having tapered collector
    4.
    发明授权
    Structure and method of self-aligned bipolar transistor having tapered collector 有权
    具有锥形集电极的自对准双极晶体管的结构和方法

    公开(公告)号：US07425754B2

    公开(公告)日：2008-09-16

    申请号：US10708340

    申请日：2004-02-25

    申请人： Hiroyuki Akatsu ,  Rama Divakaruni ,  Gregory G. Freeman ,  David R. Greenberg ,  Marwan H. Khater ,  William R. Tonti

    发明人： Hiroyuki Akatsu ,  Rama Divakaruni ,  Gregory G. Freeman ,  David R. Greenberg ,  Marwan H. Khater ,  William R. Tonti

    IPC分类号： H01L27/102

    CPC分类号： H01L29/66242 ,  H01L29/0821 ,  H01L29/7378

    摘要： A bipolar transistor is provided which includes a tapered, i.e. frustum-shaped, collector pedestal having an upper substantially planar surface, a lower surface, and a slanted sidewall extending between the upper surface and the lower surface, the upper surface having substantially less area than the lower surface. The bipolar transistor further includes an intrinsic base overlying the upper surface of the collector pedestal, a raised extrinsic base conductively connected to the intrinsic base and an emitter overlying the intrinsic base. In a particular embodiment, the emitter is self-aligned to the collector pedestal, having a centerline which is aligned to the centerline of the collector pedestal.

    摘要翻译： 提供了一种双极晶体管，其包括锥形的，即截头锥形的收集器基座，其具有上部基本平坦的表面，下表面和在上表面和下表面之间延伸的倾斜侧壁，上表面具有基本上较小的面积 下表面。 双极晶体管还包括覆盖集电极基座的上表面的本征基极，与本征基极导电连接的升高的外部基极和覆盖本征基极的发射极。 在特定实施例中，发射器与收集器基座自对准，具有与收集器基座的中心线对准的中心线。