Invention Grant
- Patent Title: Semiconductor device having self-aligned gate pattern
- Patent Title (中): 具有自对准栅极图案的半导体器件
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Application No.: US11434128Application Date: 2006-05-16
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Publication No.: US07388249B2Publication Date: 2008-06-17
- Inventor: Woon-Kyung Lee
- Applicant: Woon-Kyung Lee
- Applicant Address: KR Suwon, Kyungki-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon, Kyungki-do
- Agency: Lee & Morse, P.C.
- Priority: KR2001-33549 20010614
- Main IPC: H01L29/76
- IPC: H01L29/76

Abstract:
The present invention provides a semiconductor device in which the gate is self-aligned to the device isolation film and a fabricating method thereof. A device isolation film restricting an active region is disposed on a portion of a semiconductor substrate, and a word line is across over the device isolation film. A gate pattern is disposed between the word line and the active region, and a tunnel oxide film is disposed between the gate pattern and the active region. The gate pattern comprises a floating gate pattern, a gate interlayer dielectric film pattern and a control gate electrode pattern deposited in the respective order, and has a sidewall self-aligned to the device isolation film. To form the gate pattern having the sidewall self-aligned to the device isolation film, a gate insulation film and a gate material film are formed in the respective order on the semiconductor substrate.
Public/Granted literature
- US20060214215A1 Semiconductor device Public/Granted day:2006-09-28
Information query
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