发明授权
- 专利标题: Semiconductor device manufacturing method
- 专利标题(中): 半导体器件制造方法
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申请号: US11225898申请日: 2005-09-14
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公开(公告)号: US07413931B2公开(公告)日: 2008-08-19
- 发明人: Takashi Noma , Kazuo Okada , Hiroshi Yamada , Masanori Iida
- 申请人: Takashi Noma , Kazuo Okada , Hiroshi Yamada , Masanori Iida
- 申请人地址: JP Osaka
- 专利权人: SANYO Electric Co., Ltd.
- 当前专利权人: SANYO Electric Co., Ltd.
- 当前专利权人地址: JP Osaka
- 代理机构: Morrison & Foerster LLP
- 优先权: JP2004-276307 20040924
- 主分类号: H01L21/312
- IPC分类号: H01L21/312
摘要:
The invention is directed to improvement of reliability of a chip size package type semiconductor device in a manufacturing method thereof. A support body is formed on a front surface of a semiconductor substrate with a first insulation film therebetween. Then, a part of the semiconductor substrate is selectively etched from its back surface to form an opening, and then a second insulation film is formed on the back surface. Next, the first insulation film and the second insulation film at a bottom of the opening are selectively etched, to expose pad electrodes at the bottom of the opening. Then, a third resist layer is selectively formed on a second insulation film at boundaries between sidewalls and the bottom of the opening on the back surface of the semiconductor substrate. Furthermore, a wiring layer electrically connected with the pad electrodes at the bottom of the opening and extending onto the back surface of the semiconductor substrate is selectively formed corresponding to a predetermined pattern.
公开/授权文献
- US20060068572A1 Semiconductor device manufacturing method 公开/授权日:2006-03-30
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