发明授权
- 专利标题: Interconnect model-order reduction method
- 专利标题(中): 互连模型阶降序法
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申请号: US11199026申请日: 2005-08-08
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公开(公告)号: US07437689B2公开(公告)日: 2008-10-14
- 发明人: Chia-Chi Chu , Herng-Jer Lee , Wu-Shiung Feng , Chao-Kai Chang
- 申请人: Chia-Chi Chu , Herng-Jer Lee , Wu-Shiung Feng , Chao-Kai Chang
- 申请人地址: TW Kwei-Shan
- 专利权人: Chang Gung University
- 当前专利权人: Chang Gung University
- 当前专利权人地址: TW Kwei-Shan
- 代理机构: Kamrath & Associates PA
- 代理商 Alan Kamrath
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
An interconnect model-order reduction method reduces a nano-level semiconductor interconnect network as an original interconnect network by using iteration-based Arnoldi algorithms. The method is performed based on a projection method and has become a necessity for efficient interconnect modeling and simulations. To select an order of the reduced-order model that can efficiently reflect essential dynamics of the original interconnect network, a residual error between transfer functions of the original interconnect network and the reduced interconnect model may be considered as a reference in determining if the iteration process should end, with analytical expressions of the residual error being derived herein. Furthermore, the approximate transfer function of the reduced interconnect model may also be expressed as an addition of the original interconnect model and some additive perturbations. A perturbation matrix is only related with resultant vectors at a previous step of the Arnoldi algorithm. Therefore, the residual error information may be taken as a reference for the order selection scheme used in Krylov subspace model-order algorithm.
公开/授权文献
- US20070033549A1 Interconnect model-order reduction method 公开/授权日:2007-02-08
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