公开(公告)号：US07512525B2

公开(公告)日：2009-03-31

申请号：US11029587

申请日：2005-01-05

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Chao-Kai Chang

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Chao-Kai Chang

IPC分类号： G06F17/10

CPC分类号： G06F17/5036

摘要： A model reduction method utilizing the rational Arnoldi method with adaptive orders (RAMAO) is applied to high-speed VLSI interconnect models. The method is based on an extension of the classical multi-point Pade approximation, using the rational Arnoldi iteration approach. Given a set of predetermined expansion points, an exact expression for the error between the output moment of the original system and that of the reduced-order system, related to each expansion point, is derived first. In each iteration of the proposed RAMAO algorithm, the expansion frequency corresponding to the maximum output moment error will be chosen. Hence, the corresponding reduced-order model yields the greatest improvement in output moments among all reduced-order models of the same order.

摘要翻译： 利用具有自适应阶数（RAMAO）的合理Arnoldi方法的模型简化方法被应用于高速VLSI互连模型。 该方法基于经典多点Pade近似的扩展，使用理性Arnoldi迭代法。 给定一组预定的扩展点，首先推导出与每个扩展点相关的原始系统的输出时刻与低阶系统的输出时刻之间的误差的精确表达式。 在所提出的RAMAO算法的每次迭代中，将选择对应于最大输出力矩误差的扩展频率。 因此，相应的降阶模型在相同阶数的所有降阶模型中产生最大的输出矩的改进。

公开(公告)号：US07373367B2

公开(公告)日：2008-05-13

申请号：US10827504

申请日：2004-04-19

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng

IPC分类号： G06F17/10

CPC分类号： H03H17/04 ,  H03H17/06 ,  H03H2017/0072

摘要： A method and apparatus for designing low-order linear-phase IIR filters is disclosed. Given an FIR filter, the method utilizes a new Krylov subspace projection method, called the rational Arnoldi method with adaptive orders, to synthesize an approximated IIR filter with small orders. The method is efficient in terms of computational complexity. The synthesized IIR filter can truly reflect essential dynamical features of the original FIR filter and indeed satisfies the design specifications. In particular, the linear-phase property is stilled remained in the passband.

摘要翻译： 公开了一种用于设计低阶线性相IIR滤波器的方法和装置。 给定FIR滤波器，该方法利用新的Krylov子空间投影方法，称为具有自适应阶数的理性Arnoldi方法，以合成具有小订单的近似IIR滤波器。 该方法在计算复杂度方面是有效的。 合成的IIR滤波器可以真正反映原始FIR滤波器的基本动态特性，确实满足了设计规范。 特别地，通带中仍然存在线性相特性。

公开(公告)号：US07181664B2

公开(公告)日：2007-02-20

申请号：US10827507

申请日：2004-04-19

申请人： Herng-Jer Lee ,  Chia-Ming Ho ,  Chia-Chi Chu ,  Wu-Shiung Feng

发明人： Herng-Jer Lee ,  Chia-Ming Ho ,  Chia-Chi Chu ,  Wu-Shiung Feng

IPC分类号： G01R31/28

CPC分类号： G01R31/318536 ,  G01R31/318575

摘要： A method for reordering a scan chain meets given constraints and minimizes peak power dissipation. The given constraints include a maximum peak power dissipation, a maximum scan chain length and a maximum distance between two successive registers. The method includes embedding a developed tool into an existing VLSI design flow for low-power circuit designs. Furthermore, the characteristics quickly judge if the problem has corresponding feasible solutions and searching the optimal solution. Modified data from the given scan chain declaration data and the scan pattern data, which satisfy the constraints, can be obtained.

摘要翻译： 扫描链重新排序的方法满足给定约束并最大限度地降低峰值功耗。 给定的约束包括最大峰值功耗，最大扫描链长度和两个连续寄存器之间的最大距离。 该方法包括将开发的工具嵌入到用于低功率电路设计的现有VLSI设计流程中。 此外，特征快速判断问题是否具有相应的可行解决方案，并寻找最优解。 可以获得来自给定的扫描链声明数据和满足约束的扫描图形数据的修改数据。

公开(公告)号：US07124381B2

公开(公告)日：2006-10-17

申请号：US10853854

申请日：2004-05-25

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Ming-Hong Lai

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Ming-Hong Lai

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： A method for efficiently estimating crosstalk noise of high-speed VLSI interconnects models high-speed VLSI interconnects as lumped RLG coupled frees. An inductive crosstalk noise waveform can be accurately estimated in an efficient manner using a linear time moment computation technique in conjunction with a projection-based order reduction method. Recursive formulas of moment computations for coupled RC trees are derived taking into consideration of both self inductances and mutual inductances. Also, analytical formulas of voltage moments at each node will be derived explicitly. These formulas can be efficiently implemented for use in crosstalk estimations.

摘要翻译： 高效VLSI互连的串扰噪声的有效估计方法是将高速VLSI互连模型作为集中的RLG耦合释放模型。 可以使用线性时间矩计算技术结合基于投影的顺序降低方法，以有效的方式精确地估计电感串扰噪声波形。 考虑到自感和互感两者，导出耦合RC树的力矩计算的递归公式。 此外，每个节点的电压矩的分析公式将被明确推导出来。 这些公式可以有效地实现用于串扰估计。

公开(公告)号：US20060149525A1

公开(公告)日：2006-07-06

申请号：US11029587

申请日：2005-01-05

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Chao-Kai Chang

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Chao-Kai Chang

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： The work proposes a model reduction method, the rational Arnoldi method with adaptive orders (RAMAO), to be applied to high-speed VLSI interconnect models. It is based on an extension of the classical multi-point Pade approximation, using the rational Arnoldi iteration approach. Given a set of predetermined expansion points, an exact expression for the error between the output moment of the original system and that of the reduced-order system, related to each expansion point, is derived first. In each iteration of the proposed RAMAO algorithm, the expansion frequency corresponding to the maximum output moment error will be chosen. Hence, the corresponding reduced-order model yields the greatest improvement in output moments among all reduced-order models of the same order.

摘要翻译： 该工作提出了一种模型简化方法，将适应性顺序（RAMAO）的理性Arnoldi方法应用于高速VLSI互连模型。 它是基于经典多点Pade近似的扩展，使用理性Arnoldi迭代法。 给定一组预定的扩展点，首先推导出与每个扩展点相关的原始系统的输出时刻与低阶系统的输出时刻之间的误差的精确表达式。 在所提出的RAMAO算法的每次迭代中，将选择对应于最大输出力矩误差的扩展频率。 因此，相应的降阶模型在相同阶数的所有降阶模型中产生最大的输出矩的改进。

公开(公告)号：US20060015832A1

公开(公告)日：2006-01-19

申请号：US10889795

申请日：2004-07-13

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Ming-Hong Lai

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Ming-Hong Lai

IPC分类号： G06F17/50 ,  G06F17/10

CPC分类号： G06F17/5036

摘要： A new moment computation technique for general lumped R(L)C interconnect circuits with multiple resistor loops is proposed. Using the concept of tearing, a lumped R(L)C network can be partitioned into a spanning tree and several resistor links. The contributions of network moments from each tree and the corresponding links can be determined independently. By combining the conventional moment computation algorithms and the reduced ordered binary decision diagram (ROBDD), the proposed method can compute system moments efficiently. Experimental results have demonstrate that the proposed method can indeed obtain accurate moments and is more efficient than the conventional approach.

摘要翻译： 提出了一种具有多个电阻环路的通用集总R（L）C互连电路的新时刻计算技术。 集中R（L）C网络使用撕裂概念可以划分为生成树和几个电阻链路。 来自每个树的网络时刻的贡献和相应的链接可以独立确定。 通过组合常规力矩计算算法和减少二阶决策图（ROBDD），提出的方法可以有效地计算系统时间。 实验结果表明，所提出的方法确实可以获得准确的时刻，并且比常规方法更有效。

公开(公告)号：US20050235023A1

公开(公告)日：2005-10-20

申请号：US10827504

申请日：2004-04-19

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng

IPC分类号： G06F17/10 ,  H03H17/04 ,  H03H17/06

CPC分类号： H03H17/04 ,  H03H17/06 ,  H03H2017/0072

摘要： A method and apparatus for designing low-order linear-phase IIR filters is disclosed. Given an FIR filter, the method utilizes a new Krylov subspace projection method, called the rational Arnoldi method with adaptive orders, to synthesize an approximated IIR filter with small orders. The method is efficient in terms of computational complexity. The synthesized IIR filter can truly reflect essential dynamical features of the original FIR filter and indeed satisfies the design specifications. In particular, the linear-phase property is stilled remained in the passband.

摘要翻译： 公开了一种用于设计低阶线性相IIR滤波器的方法和装置。 给定FIR滤波器，该方法利用新的Krylov子空间投影方法，称为具有自适应阶数的理性Arnoldi方法，以合成具有小订单的近似IIR滤波器。 该方法在计算复杂度方面是有效的。 合成的IIR滤波器可以真正反映原始FIR滤波器的基本动态特性，确实满足了设计规范。 特别地，通带中仍然存在线性相特性。

公开(公告)号：US20070033549A1

公开(公告)日：2007-02-08

申请号：US11199026

申请日：2005-08-08

申请人： Chia-Chi Chu ,  Herng-Jer Lee ,  Wu-Shiung Feng ,  Chao-Kai Chang

发明人： Chia-Chi Chu ,  Herng-Jer Lee ,  Wu-Shiung Feng ,  Chao-Kai Chang

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： An interconnect model-order reduction method for reduction of a nano-level semiconductor interconnect network as an original interconnect network by using iteration-based Arnoldi algorithms disclosed. The method is performed based on a projection method and has become a necessity for efficient interconnect modeling and simulations. To select order of the reduced-order model that can efficiently reflect essential dynamics of the original interconnect network, a residual error between transfer functions of the original interconnect network and the reduced interconnect model may be considered as a reference in determining if the iteration process should end, analytical expressions of the residual error being derived herein. Furthermore, the approximate transfer function of the reduced interconnect model may also be expressed as an addition of the original interconnect model and some additive perturbations. A perturbation matrix is only related with resultant vectors at a previous step of the Arnoldi algorithm. Therefore, the residual error information may be taken as a reference for the order selection scheme used in Krylov subspace model-order algorithm.

摘要翻译： 一种用于通过使用基于迭代的Arnoldi算法来将纳米级半导体互连网络还原为原始互连网络的互连模型级降低方法。 该方法基于投影方法进行，并且已经成为有效的互连建模和模拟的必要条件。 为了选择可以有效地反映原始互连网络的基本动力学的简化模型的顺序，原始互连网络的传递函数与简化的互连模型之间的残差可能被认为是确定迭代过程应该如何 结束，这里得出的残差的解析表达式。 此外，还原互连模型的近似传递函数也可以表示为原始互连模型和一些附加扰动的相加。 扰动矩阵仅与Arnoldi算法前一步的合成矢量有关。 因此，剩余误差信息可以作为Krylov子空间模型顺序算法中使用的顺序选择方案的参考。

公开(公告)号：US20060100830A1

公开(公告)日：2006-05-11

申请号：US10982667

申请日：2004-11-05

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng

IPC分类号： G06F17/10

CPC分类号： G06F17/5036

摘要： A method for efficiently estimating crosstalk noise of nanometer VLSI interconnects is provided. In the invention, nanometer VLSI interconnects are modeled as nonuniform distributed RLC coupled trees. The efficiency and the accuracy of moment computation of distributed lines can be shown that outperform those of lumped ones. The inductive crosstalk noise waveform can be accurately estimated in an efficient manner using the linear time moment computation technique in conjunction with the projection-based order reduction method. Recursive formulas of moment computations for coupled RC trees are derived with considering both self inductances and mutual inductances. Also, analytical formulas of voltage moments at each node will be derived explicitly. These formulas can be efficiently implemented for crosstalk estimations.

摘要翻译： 提供了一种用于有效估计纳米VLSI互连的串扰噪声的方法。 在本发明中，纳米VLSI互连被建模为非均匀分布式RLC耦合树。 可以看出，分布式线路的力矩计算的效率和精度优于集中线路。 可以使用线性时间矩计算技术结合基于投影的顺序降低方法，以有效的方式精确地估计电感串扰噪声波形。 考虑自感和互感两种情况，导出耦合RC树的力矩计算的递归公式。 此外，每个节点的电压矩的分析公式将被明确推导出来。 可以有效地实现这些公式用于串扰估计。

公开(公告)号：US20050278668A1

公开(公告)日：2005-12-15

申请号：US10853854

申请日：2004-05-25

申请人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Ming-Hong Lai

发明人： Herng-Jer Lee ,  Chia-Chi Chu ,  Wu-Shiung Feng ,  Ming-Hong Lai

IPC分类号： G06F9/45 ,  G06F17/50

CPC分类号： G06F17/5036

摘要： A method for efficiently estimating crosstalk noise of high-speed VLSI interconnects is provided. In the invention, high-speed VLSI interconnects are modeled as lumped RLC coupled trees. The inductive crosstalk noise waveform can be accurately estimated in an efficient manner using the linear time moment computation technique in conjunction with the projection-based order reduction method. Recursive formulas of moment computations for coupled RC trees are derived with considering both self inductances and mutual inductances. Also, analytical formulas of voltage moments at each node will be derived explicitly. These formulas can be efficiently implemented for crosstalk estimations.

摘要翻译： 提供了一种用于有效估计高速VLSI互连的串扰噪声的方法。 在本发明中，高速VLSI互连被建模为集中RLC耦合的树。 可以使用线性时间矩计算技术结合基于投影的顺序降低方法，以有效的方式精确地估计电感串扰噪声波形。 考虑自感和互感两种情况，导出耦合RC树的力矩计算的递归公式。 此外，每个节点的电压矩的分析公式将被明确推导出来。 可以有效地实现这些公式用于串扰估计。