Invention Grant
- Patent Title: Methods of forming self-aligned floating gates using multi-etching
- Patent Title (中): 使用多次蚀刻形成自对准浮栅的方法
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Application No.: US11178709Application Date: 2005-07-11
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Publication No.: US07459364B2Publication Date: 2008-12-02
- Inventor: Sang-Hoon Lee , Hun-Hyeoung Leam , Jai-Dong Lee , Jung-Hwan Kim , Young-Sub You , Ki-Su Na , Woong Lee , Yong-Sun Lee , Won-Jun Jang
- Applicant: Sang-Hoon Lee , Hun-Hyeoung Leam , Jai-Dong Lee , Jung-Hwan Kim , Young-Sub You , Ki-Su Na , Woong Lee , Yong-Sun Lee , Won-Jun Jang
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2004-0054060 20040712
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A method of forming a floating gate of a non-volatile memory device can include etching a mask pattern formed between field isolation regions in a field isolation pattern on a substrate to recess a surface of the mask pattern below an upper surface of adjacent field isolation regions to form an opening having a width defined by a side wall of the adjacent field isolation regions above the surface. Then the adjacent field isolation regions is etched to increase the width of the opening.
Public/Granted literature
- US20060068547A1 Methods of forming self-aligned floating gates using multi-etching Public/Granted day:2006-03-30
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