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US07462527B2 Method of forming nitride films with high compressive stress for improved PFET device performance
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形成具有高压缩应力的氮化物薄膜以提高PFET器件性能的方法
- 专利标题： Method of forming nitride films with high compressive stress for improved PFET device performance
- 专利标题（中）： 形成具有高压缩应力的氮化物薄膜以提高PFET器件性能的方法
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申请号： US11160705申请日： 2005-07-06
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公开(公告)号： US07462527B2公开(公告)日： 2008-12-09
- 发明人: Richard A. Conti , Ronald P. Bourque , Nancy R. Klymko , Anita Madan , Michael C. Smits , Roy H. Tilghman , Kwong Hon Wong , Daewon Yang
- 申请人： Richard A. Conti , Ronald P. Bourque , Nancy R. Klymko , Anita Madan , Michael C. Smits , Roy H. Tilghman , Kwong Hon Wong , Daewon Yang
- 申请人地址： US NY Armonk US CA San Jose
- 专利权人： International Business Machines Corporation,Novellus Systems, Inc.
- 当前专利权人： International Business Machines Corporation,Novellus Systems, Inc.
- 当前专利权人地址： US NY Armonk US CA San Jose
- 代理商 Yuanmin Cai
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238
摘要：
A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride layer is deposited using a high-density plasma (HDP) process, wherein the substrate is disposed on an electrode to which a bias power in the range of about 50 W to about 500 W is supplied. The bias power is characterized as high-frequency power (supplied by an RF generator at 13.56 MHz). The FET device may also include NFET gate structures. A blocking layer is deposited over the NFET gate structures so that the nitride layer overlies the blocking layer; after the blocking layer is removed, the nitride layer is not in contact with the NFET gate structures. The nitride layer has a thickness in the range of about 300-2000 Å.
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