Method of forming nitride films with high compressive stress for improved PFET device performance
    2.
    发明授权
    Method of forming nitride films with high compressive stress for improved PFET device performance 失效
    形成具有高压缩应力的氮化物薄膜以提高PFET器件性能的方法

    公开(公告)号:US07462527B2

    公开(公告)日:2008-12-09

    申请号:US11160705

    申请日:2005-07-06

    IPC分类号: H01L21/8238

    摘要: A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride layer is deposited using a high-density plasma (HDP) process, wherein the substrate is disposed on an electrode to which a bias power in the range of about 50 W to about 500 W is supplied. The bias power is characterized as high-frequency power (supplied by an RF generator at 13.56 MHz). The FET device may also include NFET gate structures. A blocking layer is deposited over the NFET gate structures so that the nitride layer overlies the blocking layer; after the blocking layer is removed, the nitride layer is not in contact with the NFET gate structures. The nitride layer has a thickness in the range of about 300-2000 Å.

    摘要翻译: 提供了一种用于制造其中氮化物层覆盖PFET栅极结构的FET器件的方法,其中氮化物层具有大于约2.8GPa的量级的压缩应力。 这种压应力允许改进PFET中的器件性能。 使用高密度等离子体(HDP)工艺沉积氮化物层,其中衬底设置在供给约50W至约500W范围内的偏置功率的电极上。 偏置功率被表征为高频功率(由13.56MHz的RF发生器提供)。 FET器件还可以包括NFET栅极结构。 在NFET栅极结构上沉积阻挡层,使得氮化物层覆盖阻挡层; 在去除阻挡层之后,氮化物层不与NFET栅极结构接触。 氮化物层的厚度在约300-2000埃的范围内。

    Method of forming nitride films with high compressive stress for improved PFET device performance
    3.
    发明授权
    Method of forming nitride films with high compressive stress for improved PFET device performance 有权
    形成具有高压缩应力的氮化物薄膜以提高PFET器件性能的方法

    公开(公告)号:US07804136B2

    公开(公告)日:2010-09-28

    申请号:US11875217

    申请日:2007-10-19

    IPC分类号: H01L23/62

    摘要: A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride layer is deposited using a high-density plasma (HDP) process, wherein the substrate is disposed on an electrode to which a bias power in the range of about 50 W to about 500 W is supplied. The bias power is characterized as high-frequency power (supplied by an RF generator at 13.56 MHz). The FET device may also include NFET gate structures. A blocking layer is deposited over the NFET gate structures so that the nitride layer overlies the blocking layer; after the blocking layer is removed, the nitride layer is not in contact with the NFET gate structures. The nitride layer has a thickness in the range of about 300-2000 Å.

    摘要翻译: 提供了一种用于制造其中氮化物层覆盖PFET栅极结构的FET器件的方法,其中氮化物层具有大于约2.8GPa的量级的压缩应力。 这种压应力允许改进PFET中的器件性能。 使用高密度等离子体(HDP)工艺沉积氮化物层,其中衬底设置在供给约50W至约500W范围内的偏置功率的电极上。 偏置功率被表征为高频功率(由13.56MHz的RF发生器提供)。 FET器件还可以包括NFET栅极结构。 在NFET栅极结构上沉积阻挡层,使得氮化物层覆盖阻挡层; 在去除阻挡层之后,氮化物层不与NFET栅极结构接触。 氮化物层的厚度在约300-2000埃的范围内。