Invention Grant
- Patent Title: Method for manufacturing substrate with cavity
- Patent Title (中): 用腔体制造衬底的方法
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Application No.: US11524402Application Date: 2006-09-21
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Publication No.: US07494844B2Publication Date: 2009-02-24
- Inventor: Hoe-Ku Jung , Myung-Sam Kang , Jung-Hyun Park
- Applicant: Hoe-Ku Jung , Myung-Sam Kang , Jung-Hyun Park
- Applicant Address: KR Suwon
- Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee Address: KR Suwon
- Priority: KR10-2005-0088093 20050922
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit pattern on one side of a seed layer by use of a first dry film; (b) laminating a second dry film on the first dry film, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer. The method in accordance with the present invention can mount a plurality of integrated circuits by reducing the thickness of a substrate on a package on package.
Public/Granted literature
- US20070065986A1 Method for manufacturing substrate with cavity Public/Granted day:2007-03-22
Information query
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